• 1 Citations
  • 1 h-Index
20112018
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Research Output 2011 2018

  • 1 Citations
  • 1 h-Index
  • 9 Article
  • 1 Conference contribution
2018

Second-order predictive ADC using a capacitor array DAC

Yonekawa, R., Inagaki, Y., Ioka, E., Takase, Y. & Matsuya, Y. 2018 Jan 1 In : IEEJ Transactions on Electronics, Information and Systems. 138, 1, p. 29-36 8 p.

Research output: Contribution to journalArticle

Computer simulation languages
Microphones
BASIC (programming language)
Capacitors
Computer programming languages
2017

A logarithmic compression ADC using transient response of a comparator

Inagaki, Y., Sugimori, Y., Ioka, E. & Matsuya, Y. 2017 Apr 1 In : IEICE Transactions on Electronics. E100C, 4, p. 359-362 4 p.

Research output: Contribution to journalArticle

Transient analysis
Electric potential
Logarithmic amplifiers
Binary codes
Circuit simulation
2016

Generation Mechanism of Alternans in Luo-Rudy Model

Kitajima, H., Ioka, E. & Yazawa, T. 2016 May 1 In : International Journal of Bifurcation and Chaos. 26, 5, 1650075

Research output: Contribution to journalArticle

Potassium
Ions
Muscle
Cells
Sodium

Noise characteristic of the chaotic double loop delta sigma modulator

Ioka, E., Watanabe, N., Makishima, R. & Matsuya, Y. 2016 Oct 1 In : International Journal of Bifurcation and Chaos. 26, 11, 1650178

Research output: Contribution to journalArticle

Delta sigma modulation
Fast Fourier transforms
Modulators
Chaos theory
2015

A study of self-dithering for ΔΣ fractional-N PLL

Kato, Y., Ioka, E. & Matsuya, Y. 2015 In : Electronics and Communications in Japan. 98, 1, p. 9-14 6 p.

Research output: Contribution to journalArticle

Phase locked loops
oscillations
Networks (circuits)
cycles
dithers
2013

A study of self-dithering for ΔΣ fractional-N PLL

Kato, Y., Ioka, E. & Matsuya, Y. 2013 In : IEEJ Transactions on Electronics, Information and Systems. 133, 2, p. 234-238 5 p.

Research output: Contribution to journalArticle

Phase locked loops
Networks (circuits)
Modulators
1 Citations

Multi bit PWMDAC with multi delay inverter

Kodama, D., Ioka, E. & Matsuya, Y. 2013 In : IEEJ Transactions on Electronics, Information and Systems. 133, 2, p. 239-244 6 p.

Research output: Contribution to journalArticle

Pulse width modulation
Clocks
MOSFET devices
Threshold voltage
Sampling
2011

Bifurcation in mutually coupled three neurons with inhibitory synapses

Ioka, E., Matusya, Y. & Kitajima, H. 2011 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011. p. 612-615 4 p. 6043617

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Neurons
Complex networks

Improving the glitch noise of Δ∑ D/A converter using the RTZ waveform

Ihara, T., Ioka, E. & Matsuya, Y. 2011 In : IEEJ Transactions on Electronics, Information and Systems. 131, 7, p. 1321-1326 6 p.

Research output: Contribution to journalArticle

Deterioration

Synchronization in neurons driven by synaptic currents with multiple frequencies

Ioka, E., Kitajima, H. & Matsuya, Y. 2011 In : IEEJ Transactions on Electronics, Information and Systems. 131, 3, p. 521-527 7 p.

Research output: Contribution to journalArticle

Neurons
Synchronization