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2019

High crystallinity multilayer graphene deposited by a low-temperature CVD using Ni catalyst with applying current

Akimoto, T. & Ueno, K., 2019 Mar, 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019. Institute of Electrical and Electronics Engineers Inc., p. 351-353 3 p. 8731128. (2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simultaneous doping / etching (SDE) process of multilayer graphene on Ni for low resistance metallization

Yokosawa, K., Akimoto, T., Okada, Y. & Ueno, K., 2019 Mar, 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019. Institute of Electrical and Electronics Engineers Inc., p. 47-49 3 p. 8731211. (2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Synthesis of nitrogen-doped multilayer graphene film by solid-phase deposition using Co-N catalyst

Fujishima, Y. & Ueno, K., 2019 Mar, 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019. Institute of Electrical and Electronics Engineers Inc., p. 354-356 3 p. 8731097. (2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2018

Oxidation Structure Change of Copper Surface Depending on Accelerated Humidity

Gomasang, P., Ogiue, S., Ueno, K. & Yokogawa, S., 2018 Aug 8, 2018 IEEE International Interconnect Technology Conference, IITC 2018. Institute of Electrical and Electronics Engineers Inc., p. 112-114 3 p. 8430461

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2017

Asimple test method forelectromigration reliability ofsolder/Cu pillar bumpsusing flat cables

Azuma, N., Owada, M., Abe, T., Nakada, T., Kubota, M. & Ueno, K., 2017 Jun 13, 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-June. p. 270-272 3 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Current enhanced solid phase precipitation (CE-SPP) for direct deposition of multilayer graphene on SiO2 from a Cu capped Co-C layer

Ichikawa, H. & Ueno, K., 2017 Jun 13, 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 244-246 3 p. 7947583

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Novel in-situ passivation of MoCl5 doped multilayer graphene with MoOx for low-resistance interconnects

Kawamoto, K., Saito, Y., Kenmoku, M. & Ueno, K., 2017 Jun 13, 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 252-254 3 p. 7947586

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2016

Synthesis of doped carbon nanotubes by CVD using NiB catalysts

Tomita, K., Kawakami, N., Aozasa, A., Aida, K. & Ueno, K., 2016 Jul 8, 2016 IEEE International Interconnect Technology Conference / Advanced Metallization Conference, IITC/AMC 2016. Institute of Electrical and Electronics Engineers Inc., p. 198-199 2 p. 7507730

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2011

Review of ADMETA Plus 2011 conference topics

Ueno, K. & Kawasaki, H., 2011 Dec 1, Advanced Metallization Conference 2011. p. 133-142 10 p. (Advanced Metallization Conference (AMC)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2010

Chemical vapor deposition of nanocarbon on electroless Ni-B alloy catalyst

Tanaka, T., Sato, T., Karasawa, Y. & Ueno, K., 2010 Dec 1, Advanced Metallization Conference 2010. p. 258-259 2 p. (Advanced Metallization Conference (AMC)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Material and process challenges for interconnects in nanoelectronics era

Ueno, K., 2010 Oct 20, Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010. p. 64-65 2 p. 5488945. (Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)
2009

Grain growth of electroplated copper film by alternative annealing methods

Ueno, K., Shimotani, K., Shimada, Y., Yomogida, S., Takeshita, T., Hashimoto, A. & Yata, T., 2009 Oct 19, Advanced Metallization Conference 2008, AMC 2008. p. 283-287 5 p. (Advanced Metallization Conference (AMC)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
2006

A novel CoWP cap integration for porous low-k/Cu interconnects with NH 3 plasma treatment and low-k top (LKT) dielectric structure

Kawahara, N., Tagami, M., Withers, B., Kakuhura, Y., Imura, H., Ohto, K., Taiji, T., Arita, K., Kurokawa, T., Nagase, M., Maruyama, T., Oda, N., Hayashi, Y., Jacobs, J., Sakurai, M., Sekine, M. & Ueno, K., 2006 Dec 1, 2006 International Interconnect Technology Conference, IITC. p. 152-154 3 p. 1648674. (2006 International Interconnect Technology Conference, IITC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Highly reliable interface of self-aligned CuSiN process with low-k SiC barrier dielectric (k=3.5) for 65nm node and beyond

Usami, T., Ide, T., Kakuhara, Y., Ajima, Y., Ueno, K., Maruyama, T., Yu, Y., Apen, E., Chattopadhyay, K., Van Schravendijk, B., Oda, N. & Sekine, M., 2006 Dec 1, 2006 International Interconnect Technology Conference, IITC. p. 125-127 3 p. 1648665. (2006 International Interconnect Technology Conference, IITC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)
2005

Chip-level performance maximization using ASIS (Application-specific Interconnect Structure) wiring design concept for 45 nm CMOS devices

Oda, N., Imura, H., Kawahara, N., Tagami, M., Kunishima, H., Sone, S., Ohnishi, S., Yamada, K., Kakuhara, Y., Sekine, M., Hayashi, Y. & Ueno, K., 2005 Dec 1, IEEE International Electron Devices Meeting, 2005 IEDM - Technical Digest. p. 1022-1025 4 p. 1609538. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Degradation of electromigration lifetime by post-annealing for CU/Low-k interconnects

Kakuhara, Y. & Ueno, K., 2005 Dec 15, 2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual. p. 656-657 2 p. (IEEE International Reliability Physics Symposium Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2004

High reliability Cu interconnection utilizing a low contamination CoWP capping layer

Ishigami, T., Kurokawa, T., Kakuhara, Y., Withers, B., Jacobs, J., Kolics, A., Ivanov, I., Sekine, M. & Ueno, K., 2004 Nov 25, Proceedings of the IEEE 2004 International Interconnect Technology Conference. p. 75-77 3 p. (Proceedings of the IEEE 2004 International Interconnect Technology Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)
1998

Uniform (111) textured Cu CVD on vacuum annealed Cu seed layer

Ueno, K., Sekiguchi, A. & Kobayashi, A., 1998 Jan 1, Proceedings of the IEEE 1998 International Interconnect Technology Conference, IITC 1998. Institute of Electrical and Electronics Engineers Inc., p. 119-121 3 p. (Proceedings of the IEEE 1998 International Interconnect Technology Conference, IITC 1998; vol. 1998-June).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
1993

Multilevel planarized-trench-aluminum (PTA) interconnection using reflow sputtering and chemical mechanical polishing

Kikuta, K., Nakajima, T., Ueno, K. & Kikkawa, T., 1993 Dec 1, Technical Digest - International Electron Devices Meeting. Anon (ed.). Publ by IEEE, p. 285-288 4 p. (Technical Digest - International Electron Devices Meeting).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)
1992

A quarter-micron planarized interconnection technology with self-aligned plug

Ueno, K., Ohto, K., Tsunenari, K., Kajiyana, K., Kikuta, K. & Kikkawa, T., 1992 Jan 1, 1992 International Technical Digest on Electron Devices Meeting, IEDM 1992. Institute of Electrical and Electronics Engineers Inc., p. 305-308 4 p. 307366. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 1992-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)
1985

HIGH TRANSCONDUCTANCE GaAs MESFETs FABRICATED USING SIDEWALL-ASSISTED SELF-ALIGNMENT TECHNOLOGY (SWAT).

Ueno, K., Furutsuka, T., Kanamori, M. & Higashisaka, A., 1985 Dec 1, Conference on Solid State Devices and Materials. Japan Soc of Applied Physics, p. 405-408 4 p. (Conference on Solid State Devices and Materials).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)