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Research Output 1998 2019

  • 265 Citations
  • 7 h-Index
  • 36 Article
  • 21 Conference contribution
  • 1 Chapter
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Article
2012
2 Citations (Scopus)

A millimeter-wave resistor-less pulse generator with a new dipole-patch antenna in 65-nm CMOS

Khanh, N. N. M., Sasaki, M. & Asada, K., 2012, (Accepted/In press) In : Analog Integrated Circuits and Signal Processing. p. 1-11 11 p.

Research output: Contribution to journalArticle

Dipole antennas
Pulse generators
Microstrip antennas
Millimeter waves
Resistors
2011
1 Citation (Scopus)
Delay circuits
Dipole antennas
Formability
Shock waves
Antennas
1 Citation (Scopus)
2 Citations (Scopus)

A 0.25-μm Si-Ge fully integrated pulse transmitter with on-chip loop antenna array towards beam-formability for millimeter-wave active imaging

Mai Khanh, N. N., Sasaki, M. & Asada, K., 2011 Oct, In : IEICE Transactions on Electronics. E94-C, 10, p. 1626-1633 8 p.

Research output: Contribution to journalArticle

Loop antennas
Formability
Antenna arrays
Millimeter waves
Transmitters
2 Citations (Scopus)
Jitter
Antenna arrays
Millimeter waves
Shock waves
Antennas
4 Citations (Scopus)

A Fully Integrated Shock Wave Transmitter with an On-Chip Dipole Antenna for Pulse Beam-Formability in 0.18-μm CMOS

Khanh, N. N., Sasaki, M. & Asada, K., 2011 Jan 1, In : Default journal. p. 107-108

Research output: Contribution to journalArticle

2010

A 0.18μm CMOS Integrated Antenna Array with Pulse Beam-formability for Active Imaging Applications

Khanh, N. N., Sasaki, M. & Asada, K., 2010 Jun 1, In : Default journal.

Research output: Contribution to journalArticle

1 Citation (Scopus)

A 0.25-μm Si-Ge Millimeter-wave Damping Pulse Transmitter Chip with On-chip Loop Antenna Array

Khanh, N. N., Sasaki, M. & Asada, K., 2010 Sep 1, In : Default journal. p. 1-2

Research output: Contribution to journalArticle

Integrated Wideband Dipole Antenna for Pulse Beam-Formability by using 0.18um CMOS Technology

Khanh, N. N., Sasaki, M. & Asada, K., 2010 Dec 1, In : Default journal. p. 1561-1564

Research output: Contribution to journalArticle

Skewed Pixel Arrays Optical Position Senor for High Accuracy

Sasaki, M., 2010 May 31, In : Default journal. 34, p. 5-8

Research output: Contribution to journalArticle

2008
63 Citations (Scopus)
63 Citations (Scopus)

A temperature sensor with an inaccuracy of -1/+0.8 °C using 90-nm 1-V CMOS for online thermal monitoring of VLSI circuits

Sasaki, M., Ikeda, M. & Asada, K., 2008 May, In : IEEE Transactions on Semiconductor Manufacturing. 21, 2, p. 201-207 7 p., 4512063.

Research output: Contribution to journalArticle

VLSI circuits
very large scale integration
temperature sensors
Temperature sensors
CMOS
2007

3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2007 Dec 1, In : Default journal. p. 526-529

Research output: Contribution to journalArticle

2006

-1/+0.8°C Error, Accurate Temperature Sensor using 90nm 1V CMOS for On-line Thermal Monitoring of VLSI circuits

Sasaki, M., Ikeda, M. & Asada, K., 2006 Mar 1, In : Default journal. p. 9-12

Research output: Contribution to journalArticle

2 Citations (Scopus)

4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2006 Dec 1, In : Default journal. p. 1007-1010

Research output: Contribution to journalArticle

35 Citations (Scopus)

A Markov chain Monte Carlo algorithm for bayesian dynamic signature verification

Muramatsu, D., Kondo, M., Sasaki, M., Tachibana, S. & Matsumoto, T., 2006 Mar, In : IEEE Transactions on Information Forensics and Security. 1, 1, p. 22-34 13 p.

Research output: Contribution to journalArticle

Markov processes
Personal digital assistants
Testing
Authentication
2005

Novel single-stage second-order structure for low-pass wide-band low-power continuous-time filters

Hadidi, K., Eguchi, K., Ito, M., Sasaki, M., Oshima, H. & Khoei, A., 2005 Sep 15, In : AEU - International Journal of Electronics and Communications. 59, 6, p. 362-369 8 p.

Research output: Contribution to journalArticle

Bandwidth
Low pass filters
Hardware
Poles
Electric power utilization
2004

0.18μm CMOS 2GHz Error-Correcting Encoder

Sasaki, M., Nozawa, M. & Matsumoto, T., 2004 Apr 1, In : Default journal.

Research output: Contribution to journalArticle

0.18μm CMOS 6GHz Pseudo Non-overlapping Clock Generator using High-speed Dividers

Sasaki, M., Yokoyama, S. & Matsumoto, T., 2004 Jul 1, In : Default journal.

Research output: Contribution to journalArticle

0.18μm CMOS 6GHz Pseudo Non-overlapping Clock Generator using High-speed Dividers

Sasaki, M., Yokoyama, S. & Matsumoto, T., 2004 Jul 1, In : WSEAS Transactions on Circuits and Systems. 5, p. 1208-1214

Research output: Contribution to journalArticle

A wired CDMA interface system

Sasaki, M., Ono, Y. & Matsumoto, T., 2004 Jul 1, In : WSEAS Transactions on Circuits and Systems. 5, p. 1215-1220

Research output: Contribution to journalArticle

Transmembrane Region Prediction with Hydropathy Index/Charge Two-Dimensional Trajectories of Stochastic Dynamical Systems

Kaburagi, T., Muramatsu, D., Hashimoto, S., Sasaki, M. & Matsumoto, T., 2004 Jan 1, In : Default journal.

Research output: Contribution to journalArticle

2003

2.5V CMOS Fully Differential Low Power High Linearity Analog Line-Driver

Hadidi, K., Hadidi?, K. & Sasaki, M., 2003 Apr 1, In : Default journal. p. 67-72

Research output: Contribution to journalArticle

A Bayesian MCMC On-Line Algorithm for Signature Verification

Kondo, M., Muramatsu, D., Sasaki, M. & Matsumoto, T., 2003 Jul 1, In : Default journal.

Research output: Contribution to journalArticle

A Bayesian MCMC On-line Signature Verification

Kondo, M., Muramatsu, D., Sasaki, M. & Matsumoto, T., 2003, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2688, p. 540-548 9 p.

Research output: Contribution to journalArticle

Markov processes
Biometrics
Authentication
Tuning
Trajectories
6 Citations (Scopus)

A low power matched filter for DS-CDMA based on analog signal processing

Sasaki, M., Sakai, T. & Matsumoto, T., 2003 Apr, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E86-A, 4, p. 752-757 6 p.

Research output: Contribution to journalArticle

Matched filters
Code division multiple access
Signal processing
Networks (circuits)
Electric power utilization

Linearity performance comparison of cascode current source and single-device current source IDPs; analyses, simulations and measurements

Hadidi, K., Morimoto, M., Futami, K., Oue, T., Ito, M., Sasaki, M., Khoei, A. & Matsumoto, T., 2003 May, In : International Journal of Electronics. 90, 5, p. 341-353 13 p.

Research output: Contribution to journalArticle

Operational amplifiers
Nonlinear distortion
Networks (circuits)
Harmonic distortion
Electric potential
2002

A Constant Bandwidth CMOS VGA ckt.

Hadidi, K., Hadidi?, K. & Sasaki, M., 2002 Apr 1, In : Default journal. p. 363-367

Research output: Contribution to journalArticle

CMOS Analog Matched Filter Using Sample-and-Hold Circuit

Kawatsu, H., Sasaki, M., Sakai, T. & Matsumoto, T., 2002 Sep 1, In : Default journal. p. 160-164

Research output: Contribution to journalArticle

7 Citations (Scopus)

DYNAMIC BIOMETRIC PERSON AUTHENTICATION USING PEN SIGNATURE TRAJECTORIES

Sakamoto, D., Kondo, M., Morita, H., Muramatsu, D., Sasaki, M. & Matsumoto, T., 2002 Nov 1, In : Default journal.

Research output: Contribution to journalArticle

On line Signature Verifier Incorporating Position, Pressure, Inclination and Velocity Trajectories

Kondo, M., Sakamoto, D., Sasaki, M. & Matsumoto, T., 2002 Jan 1, In : Default journal.

Research output: Contribution to journalArticle

2001

A 500MS/sec -54dB THD Open-Loop CMOS Sample-and-Hold Stage

University), H. KU. & Sasaki, M., 2001 Sep 1, In : Default journal. 2, p. 83

Research output: Contribution to journalArticle

A NEW ONLINE SIGNATURE VERIFICATION ALGORITHM INCORPORATING PEN VELOCITY TRAJECTORIES

Kondo, M., Sakamoto, D., Sasaki, M. & Matsumoto, T., 2001 Nov 1, In : Default journal.

Research output: Contribution to journalArticle

A "Variable Capacitance" Circuit for Tuning Integrated Filters and Oscillators

University)?, K. HU. & Sasaki, M., 2001 Sep 1, In : Default journal. 2, p. 88

Research output: Contribution to journalArticle

2000

A highly linear open-loop full CMOS high-speed sample-and-hold stage

Hadidi, K., Sasaki, M., Watanabe, T., Muramatsu, D. & Matsumoto, T., 2000, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E82-A, 2, p. 261-266 6 p.

Research output: Contribution to journalArticle

Sampling
Networks (circuits)
Modulation
1998
19 Citations (Scopus)

An Open-Loop Full CMOS 103MHz -61dB THD S/H Circuit

Hadidi, K., Sasaki, M., Watanabe, T., Muramatsu, D. & Matsumoto, T., 1998 May 1, In : Default journal. p. 381-383

Research output: Contribution to journalArticle