Abstract
This paper reports the first successful fabrication of high-performance, 0.1-μm p+-gate pseudomorphic heterojunction-FET's (HJFET's). By introducing the two-step dry-etching technique which compensates for the poor dry-etching resistance of PMMA, 0.1-jum or less gate-openings with a high aspect-ratio of 3.5 in SiO2 film are achieved. In addition, by using the gate-electrode filling technique with selective MOMBE p+-GaAs growth, 0.1-jum voidless p+-GaAs gate electrodes with a high aspect-ratio are achieved for the first time. The fabrication technology leads to a reduction of external gate fringing capacitance (Cfext) in a T-shaped gate-structure and an improvement in gate turn-on voltage. The fabricated 0.1-jum, T-shaped, p+-gate n-Al0.2Gao.sAs/In0 25Ga0.7sAs HJFET exhibits a high gate turn-on voltage (V>) of about 0.9 V, and a good gmmax of 435 mS/mm. Also, an excellent microwave performance of fT = 121 GHz and /max = 144 GHz is achieved due to the Cfext reduction. The technology and device show great promise for future high-speed applications, such as in power devices, MMIC's, and digital IC's.
Original language | English |
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Pages (from-to) | 1183-1189 |
Number of pages | 7 |
Journal | IEEE Transactions on Electron Devices |
Volume | 45 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1998 Dec 1 |
Externally published | Yes |
Keywords
- Crystals
- Etching
- Jfet's
- Modfet's
- Plasma materials
- Processing application
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering