0.1-μm self-aligned-gate GaAs MESFET with multilayer interconnection structure for ultra-high-speed ICs

Masami Tokumitsu, Makoto Hirano, Taiichi Otsuji, Satoshi Yamaguchi, Kimiyoshi Yamasaki

    Research output: Contribution to journalConference articlepeer-review

    16 Citations (Scopus)

    Abstract

    We have developed the technologies to fabricate about 0.1-μm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-μm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-μm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.

    Original languageEnglish
    Pages (from-to)211-214
    Number of pages4
    JournalTechnical Digest - International Electron Devices Meeting
    Publication statusPublished - 1996 Dec 1
    EventProceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA
    Duration: 1996 Dec 81996 Dec 11

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Condensed Matter Physics
    • Electrical and Electronic Engineering
    • Materials Chemistry

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