0.21-fJ GaAs DCFL circuits using 0.2-/zm Y-shaped gate AlGaAs/InGaAs E/D-HJFETs

Shigeki Wada, Masatoshi Tokushima, Masaoki Ishikawa, Nobuhide Yoshida, Masahiro Fujii, Tadashi Maeda

Research output: Research - peer-reviewArticle

Abstract

Ultra-low-power-consumption and high-speed DCFL circuits have been fabricated by using 0.2-/im Y-shaped gate E/D-heterojunction-FETs (HJFETs) with a high-aspectratio gate-structure, which has an advantage of reducing the gate-fringing capacitance (Cf) to about a half of that of a conventional low-aspect-ratio one. A fabricated 51-stage ring oscillator with the 0.2-/im Y-shaped gate n-AlGaAs/i-InGaAs E/DHJFETs shows the lowest power-delay product of 0.21 fj with an unloaded propagation delay of 34.9ps at a supply voltage (Vbo) of 0.4 V. We also analyze the DCFL switching characteristics by taking into account the intrinsic gate-to-source capacitance (Cj2') and the Cf. The analysis results for the power-delay products agree well with our experimental results. Our analysis also indicates the DCFL circuit with the high-aspcct-ratio Yshaped gate E/D-HJFETs can reduce the power-delay products by 35% or more below 0.25-/jm gate-length as compared to conventional ones with the low-aspect-ratio Y-shaped gate HJFETs. These results clarify that the Cf-reduction of the Y-shaped gate HJFETs is more effective in improving the power-delay products than reducing the gate-length.

LanguageEnglish
Pages491-496
Number of pages6
JournalIEICE Transactions on Electronics
VolumeE82-C
Issue number3
StatePublished - 1999
Externally publishedYes

Fingerprint

Field effect transistors
Heterojunctions
Networks (circuits)
gallium arsenide
Aspect ratio
Capacitance
Electric power utilization
Electric potential

Keywords

  • DCFL
  • Gaas
  • Heterojunction fet
  • Low supply voltage
  • Y-shaped gate

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Wada, S., Tokushima, M., Ishikawa, M., Yoshida, N., Fujii, M., & Maeda, T. (1999). 0.21-fJ GaAs DCFL circuits using 0.2-/zm Y-shaped gate AlGaAs/InGaAs E/D-HJFETs. IEICE Transactions on Electronics, E82-C(3), 491-496.

0.21-fJ GaAs DCFL circuits using 0.2-/zm Y-shaped gate AlGaAs/InGaAs E/D-HJFETs. / Wada, Shigeki; Tokushima, Masatoshi; Ishikawa, Masaoki; Yoshida, Nobuhide; Fujii, Masahiro; Maeda, Tadashi.

In: IEICE Transactions on Electronics, Vol. E82-C, No. 3, 1999, p. 491-496.

Research output: Research - peer-reviewArticle

Wada, S, Tokushima, M, Ishikawa, M, Yoshida, N, Fujii, M & Maeda, T 1999, '0.21-fJ GaAs DCFL circuits using 0.2-/zm Y-shaped gate AlGaAs/InGaAs E/D-HJFETs' IEICE Transactions on Electronics, vol E82-C, no. 3, pp. 491-496.
Wada, Shigeki ; Tokushima, Masatoshi ; Ishikawa, Masaoki ; Yoshida, Nobuhide ; Fujii, Masahiro ; Maeda, Tadashi. / 0.21-fJ GaAs DCFL circuits using 0.2-/zm Y-shaped gate AlGaAs/InGaAs E/D-HJFETs. In: IEICE Transactions on Electronics. 1999 ; Vol. E82-C, No. 3. pp. 491-496
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