A 120Gb/s multiplexer and a 110Gb/s demultiplexer are implemented in an InP HBT process. They feature a direct drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted micro-strip lines. Their input sensitivity is less than 100mVpp, and the output swing is more than 400mVpp.
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Publication status||Published - 2003 Dec 1|
|Event||Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement - San Francisco, CA., United States|
Duration: 2003 Feb 15 → 2003 Feb 19
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering