Abstract
The Motion Picture Experts Group (MPEG)4 video codec implements essential functions in the MPEG4 committee draft. It consumes 60 mW at 30 MHz, 30% of the power dissipation of a conventional CMOS design. Measured power dissipation is presented. 70% power reduction is achieved by low-power techniques at circuit and architectural levels. Another way to reduce power dissipation is to reduce supply voltage without lower threshold voltage of those circuit clusters where the speed required is much lower than in critical paths. This clustered voltage scaling technique (CVS) reduces power dissipation without degrading chip operating frequency.
Original language | English |
---|---|
Pages (from-to) | 36-37 |
Number of pages | 2 |
Journal | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
Publication status | Published - 1998 |
Externally published | Yes |
Event | Proceedings of the 1998 IEEE 45th International Solid-State Circuits Conference, ISSCC - San Francisco, CA, USA Duration: 1998 Feb 5 → 1998 Feb 7 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering