A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO2 mask Al etching and plasma enhanced chemical vapor deposition SiOF

Takashi Yokoyama; Yoshiaki Yamada; Koji Kishimoto; Tatsuya Usami; Hideaki Kawamoto; Kazuyoshi Ueno; Hideki Gomi

doi:10.1143/jjap.37.1140

A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF

Takashi Yokoyama, Yoshiaki Yamada, Koji Kishimoto, Tatsuya Usami, Hideaki Kawamoto, Kazuyoshi Ueno, Hideki Gomi

Research output: Contribution to journal › Article › peer-review

Abstract

A 0.7-μm-pitch double level aluminum (Al) interconnection technology on a 1-μm-high step is established for 1-Gbit dynamic random access memories (DRAMs). A SiO₂ film which has a high resistance to Al etching was used as the mask layer. 0.35-μm-width Al wirings were fabricated even on a 1-μm-high step. 0.2-μm-spaces (aspect ratio=2.5) between the taper shaped Al lines were filled, for the first time, by a plasma enhanced chemical vapor deposition (PECVD) fluorine doped silicon oxide (SiOF) film (ε=3.9). The SiOF film capped with the PECVD SiO₂ film has enough stability for the process integration. It was confirmed that these technologies can be applied to a double level Al interconnection using a 0.3-μm-diameter tungsten (W) plug.

Original language	English
Pages (from-to)	1140-1144
Number of pages	5
Journal	Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume	37
Issue number	3 SUPPL. B
DOIs	https://doi.org/10.1143/jjap.37.1140
Publication status	Published - 1998 Mar
Externally published	Yes

Keywords

Al etching
DRAM
PECVD
Photoresist
SiO
SiOF
Step height

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

Access to Document

10.1143/jjap.37.1140

Cite this

Yokoyama, T., Yamada, Y., Kishimoto, K., Usami, T., Kawamoto, H., Ueno, K., & Gomi, H. (1998). A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 37(3 SUPPL. B), 1140-1144. https://doi.org/10.1143/jjap.37.1140

A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF. / Yokoyama, Takashi; Yamada, Yoshiaki; Kishimoto, Koji; Usami, Tatsuya; Kawamoto, Hideaki; Ueno, Kazuyoshi; Gomi, Hideki.

In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 37, No. 3 SUPPL. B, 03.1998, p. 1140-1144.

Research output: Contribution to journal › Article › peer-review

Yokoyama, T, Yamada, Y, Kishimoto, K, Usami, T, Kawamoto, H, Ueno, K & Gomi, H 1998, 'A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF', Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, vol. 37, no. 3 SUPPL. B, pp. 1140-1144. https://doi.org/10.1143/jjap.37.1140

Yokoyama T, Yamada Y, Kishimoto K, Usami T, Kawamoto H, Ueno K et al. A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 1998 Mar;37(3 SUPPL. B):1140-1144. https://doi.org/10.1143/jjap.37.1140

Yokoyama, Takashi ; Yamada, Yoshiaki ; Kishimoto, Koji ; Usami, Tatsuya ; Kawamoto, Hideaki ; Ueno, Kazuyoshi ; Gomi, Hideki. / A 0.7-μm-pitch double level Al interconnection technology for 1-Gbit DRAMs using SiO₂ mask Al etching and plasma enhanced chemical vapor deposition SiOF. In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 1998 ; Vol. 37, No. 3 SUPPL. B. pp. 1140-1144.

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abstract = "A 0.7-μm-pitch double level aluminum (Al) interconnection technology on a 1-μm-high step is established for 1-Gbit dynamic random access memories (DRAMs). A SiO2 film which has a high resistance to Al etching was used as the mask layer. 0.35-μm-width Al wirings were fabricated even on a 1-μm-high step. 0.2-μm-spaces (aspect ratio=2.5) between the taper shaped Al lines were filled, for the first time, by a plasma enhanced chemical vapor deposition (PECVD) fluorine doped silicon oxide (SiOF) film (ε=3.9). The SiOF film capped with the PECVD SiO2 film has enough stability for the process integration. It was confirmed that these technologies can be applied to a double level Al interconnection using a 0.3-μm-diameter tungsten (W) plug.",

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