TY - GEN
T1 - A 3.5mm2, inductor-less digital-intensive radio SoC for 300-to-950MHz ISM-band applications supporting 1.0-to-240kbps multi-data-rates
AU - Tokairin, Takashi
AU - Saito, Hiromi
AU - Ishizaki, Haruya
AU - Oka, Yoshitaka
AU - Maeda, Tadashi
AU - Oshima, Seiichi
AU - Soda, Masaaki
AU - Okada, Mitsuji
AU - Hori, Shinichi
AU - Kitsunezuka, Masaki
AU - Mizuno, Masayuki
PY - 2011/9/16
Y1 - 2011/9/16
N2 - A small-sized (less than 2mm2 total analog and radio area) sub-GHz radio SoC for low power and low data-rate wireless applications is presented. The SoC has been equipped with a low-power analog-to-digital conversion scheme having a variable over-sampling ratio, multi-sampling-rate channel select filtering, and inductor-less RF front-end circuits incorporating a high output power stair-like shaping CMOS power-amplifier with a duty-imbalance-compensated level-shifter. The SoC, fabricated with 90nm CMOS, occupies only 3.5mm2. It has a sensitivity of -118dBm in a 2.4kbps FSK mode for a 433MHz band, and channel selectivity for data rates ranging from 1.0 to 240kbps.
AB - A small-sized (less than 2mm2 total analog and radio area) sub-GHz radio SoC for low power and low data-rate wireless applications is presented. The SoC has been equipped with a low-power analog-to-digital conversion scheme having a variable over-sampling ratio, multi-sampling-rate channel select filtering, and inductor-less RF front-end circuits incorporating a high output power stair-like shaping CMOS power-amplifier with a duty-imbalance-compensated level-shifter. The SoC, fabricated with 90nm CMOS, occupies only 3.5mm2. It has a sensitivity of -118dBm in a 2.4kbps FSK mode for a 433MHz band, and channel selectivity for data rates ranging from 1.0 to 240kbps.
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UR - http://www.scopus.com/inward/citedby.url?scp=80052666437&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:80052666437
SN - 9784863481657
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 30
EP - 31
BT - 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers
T2 - 2011 Symposium on VLSI Circuits, VLSIC 2011
Y2 - 15 June 2011 through 17 June 2011
ER -