Recent IoT devices are required to be an extremely low power in idle time, while a certain performance is required in active time. NVCMA (Non-volatile Cool Mega Array) is a coarse-grain reconfigurable accelerator (CGRA) providing memory elements with spin transfer torque type non-volatile memory technology to keep data when the power gating is applied. Here, in order to reduce the energy for storing data into non-volatile Flip Flops (NVFF)s, a verification mechanism is introduced. The data are written with a storing time much shorter than usual. If the verification result is not correct, the next trial is done until all results are verified. This approach can omit unnecessary energy for using long writing time with margin considering variation and temperature. For NVCMA, we propose a power manager which controls store, restore, verification, sleep-down and wake-up by extending micro-instructions of the original CMA. Sophisticated power management both for storing data into NVFFs and power gating is integrated into the application program, and the content of data memory can be stored in NVFFs as required as well as configuration data and micro-instructions. Total NVFFs are divided into 10 independent domains which can be controlled independently. Power management instructions are designed so as to reduce the number of instructions as possible by using the bit-map registers and compound instructions. By using the short store with verification, the energy for storing data was reduced by 30% in average. The ever-on leakage power is just about 4% of the total leakage which can be saved by the power gating. Compared with the hard-wired implementation, the proposed power manager increases the area by 17.7%, yet the total area overhead is only 4%.