A Complex Multiplier using Redundant Binary Adders for the Four Operands Real Multiply-Accumulation

Yoshimasa Negishi, Eiji Watanabe, Akinori Nishihara, Takeshi Yanagisawa

Research output: Contribution to journalArticle

Original languageEnglish
Pages (from-to)593-596
Journal1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems
Publication statusPublished - 1999 Dec 1

Cite this

A Complex Multiplier using Redundant Binary Adders for the Four Operands Real Multiply-Accumulation. / Negishi, Yoshimasa; Watanabe, Eiji; Nishihara, Akinori; Yanagisawa, Takeshi.

In: 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 01.12.1999, p. 593-596.

Research output: Contribution to journalArticle

@article{069a7a98401549aba870fffe647060b9,
title = "A Complex Multiplier using Redundant Binary Adders for the Four Operands Real Multiply-Accumulation",
author = "Yoshimasa Negishi and Eiji Watanabe and Akinori Nishihara and Takeshi Yanagisawa",
year = "1999",
month = "12",
day = "1",
language = "English",
pages = "593--596",
journal = "1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems",

}

TY - JOUR

T1 - A Complex Multiplier using Redundant Binary Adders for the Four Operands Real Multiply-Accumulation

AU - Negishi, Yoshimasa

AU - Watanabe, Eiji

AU - Nishihara, Akinori

AU - Yanagisawa, Takeshi

PY - 1999/12/1

Y1 - 1999/12/1

M3 - Article

SP - 593

EP - 596

JO - 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems

JF - 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems

ER -