A High-speed and High-coding-gain Viterbi Decoder LSI with Low Power Consumption Employing SST Scheme

S. Kubota, K. Ohtani, S. Kato

Research output: Contribution to journalArticle

Original languageEnglish
JournalIEE Electronics letters
Publication statusPublished - 1986 Apr 1

Cite this

A High-speed and High-coding-gain Viterbi Decoder LSI with Low Power Consumption Employing SST Scheme. / Kubota, S.; Ohtani, K.; Kato, S.

In: IEE Electronics letters, 01.04.1986.

Research output: Contribution to journalArticle

@article{b14a38e88b2f4c64885e7d133763909f,
title = "A High-speed and High-coding-gain Viterbi Decoder LSI with Low Power Consumption Employing SST Scheme",
author = "S. Kubota and K. Ohtani and S. Kato",
year = "1986",
month = "4",
day = "1",
language = "English",
journal = "IEE Electronics letters",

}

TY - JOUR

T1 - A High-speed and High-coding-gain Viterbi Decoder LSI with Low Power Consumption Employing SST Scheme

AU - Kubota, S.

AU - Ohtani, K.

AU - Kato, S.

PY - 1986/4/1

Y1 - 1986/4/1

M3 - Article

JO - IEE Electronics letters

JF - IEE Electronics letters

ER -