A low-noise low-IF 0.18μm CMOS receiver IC with an active on-chip channel-selection filter for 5GHz wireless applications

Hitoshi Yano, Shinichi Hori, Tadashi Maeda, Noriaki Matsuno, Keiichi Numata, Masahiro Fujii, Nobuhide Yoshida, Yuji Takahashi, Hikaru Hida

Research output: Contribution to journalArticle

Abstract

We have developed a low-noise one-chip receiver IC using a low-IF architecture. The IC includes an active channel-selection band pass filter (BPF) for the IEEE802.11a standard. To improve both its total noise figure (NF) and image-rejection ratio, we employ an RC-bridge-type phase shifter which provides a ±45° phase difference. An overall NF as low as 11dB and a 32dB image-rejection ratio was achieved with the 0.18μm CMOS IC, which comprises low-noise amplifiers (LNAs), image-rejection mixers, a quadrature voltage-controlled oscillator (VCO), a phase-locked loop (PLL), the BPF, and IF amplifiers.

Original languageEnglish
Pages (from-to)314-319
Number of pages6
JournalNEC Research and Development
Volume43
Issue number4
Publication statusPublished - 2002 Oct

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Keywords

  • CMOS
  • Gm-C filter
  • Low-IF
  • Low-noise amplifiers
  • One-chip transceiver
  • PLL
  • Quadrature VCO
  • RF front-end

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Yano, H., Hori, S., Maeda, T., Matsuno, N., Numata, K., Fujii, M., Yoshida, N., Takahashi, Y., & Hida, H. (2002). A low-noise low-IF 0.18μm CMOS receiver IC with an active on-chip channel-selection filter for 5GHz wireless applications. NEC Research and Development, 43(4), 314-319.