A new interlayer formation technology for completely planarized multilevel interconnection by using LPD

T. Homma; T. Katoh; Y. Yamada; J. Shimizu; Y. Murao

doi:10.1109/VLSIT.1990.110979

A new interlayer formation technology for completely planarized multilevel interconnection by using LPD

T. Homma, T. Katoh, Y. Yamada, J. Shimizu, Y. Murao

Research output: Contribution to journal › Conference article

12 Citations (Scopus)

Abstract

A description is given of a newly developed selective interlayer dielectrics formation technology to realize completely planarized multilevel interconnections. The technology uses liquid phase deposition (LPD) at extremely low temperature (∼40°C). This technology has the capability to realize high density VLSIs such as logic devices beyond 100-kgate and memory devices beyond 16-Mb because of the low thermal stress and the excellent planarization characteristics. This technology eliminates key hole formation in spacings among wirings. Selective deposition is possible by LPD. Compared with conventional CVD films, the LPD-SiO₂ film has excellent properties for interlayer dielectrics. A completely planarized two-level interconnection using the LPD technology is discussed.

Original language	English
Article number	5727439
Pages (from-to)	3-4
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
DOIs	https://doi.org/10.1109/VLSIT.1990.110979
Publication status	Published - 1990 Dec 1
Event	1990 Symposium on VLSI Technology - Honolulu, HI, United States Duration: 1990 Jun 4 → 1990 Jun 7

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ASJC Scopus subject areas

Electrical and Electronic Engineering

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Homma, T., Katoh, T., Yamada, Y., Shimizu, J., & Murao, Y. (1990). A new interlayer formation technology for completely planarized multilevel interconnection by using LPD. Digest of Technical Papers - Symposium on VLSI Technology, 3-4. [5727439]. https://doi.org/10.1109/VLSIT.1990.110979

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AB - A description is given of a newly developed selective interlayer dielectrics formation technology to realize completely planarized multilevel interconnections. The technology uses liquid phase deposition (LPD) at extremely low temperature (∼40°C). This technology has the capability to realize high density VLSIs such as logic devices beyond 100-kgate and memory devices beyond 16-Mb because of the low thermal stress and the excellent planarization characteristics. This technology eliminates key hole formation in spacings among wirings. Selective deposition is possible by LPD. Compared with conventional CVD films, the LPD-SiO2 film has excellent properties for interlayer dielectrics. A completely planarized two-level interconnection using the LPD technology is discussed.

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10.1109/VLSIT.1990.110979