A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs

Masami Tokumitsu; Makoto Hirano; Taiichi Otsuji; Satoshi Yamaguchi; Kimiyoshi Yamasaki

doi:10.1109/IEDM.1996.553570

A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs

Masami Tokumitsu, Makoto Hirano, Taiichi Otsuji, Satoshi Yamaguchi, Kimiyoshi Yamasaki

Research output: Contribution to journal › Conference article › peer-review

17 Citations (Scopus)

Abstract

We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.

Original language	English
Pages (from-to)	211-214
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting, IEDM
DOIs	https://doi.org/10.1109/IEDM.1996.553570
Publication status	Published - 1996
Externally published	Yes
Event	Proceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA Duration: 1996 Dec 8 → 1996 Dec 11

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1109/IEDM.1996.553570

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@article{abf96091f60f4e339f1b3a9f819324ff,

title = "A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs",

abstract = "We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.",

author = "Masami Tokumitsu and Makoto Hirano and Taiichi Otsuji and Satoshi Yamaguchi and Kimiyoshi Yamasaki",

note = "Publisher Copyright: {\textcopyright} 1996IEEE; Proceedings of the 1996 IEEE International Electron Devices Meeting ; Conference date: 08-12-1996 Through 11-12-1996",

year = "1996",

doi = "10.1109/IEDM.1996.553570",

language = "English",

pages = "211--214",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs

AU - Tokumitsu, Masami

AU - Hirano, Makoto

AU - Otsuji, Taiichi

AU - Yamaguchi, Satoshi

AU - Yamasaki, Kimiyoshi

PY - 1996

Y1 - 1996

N2 - We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.

AB - We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.

UR - http://www.scopus.com/inward/record.url?scp=0030393798&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030393798&partnerID=8YFLogxK

U2 - 10.1109/IEDM.1996.553570

DO - 10.1109/IEDM.1996.553570

M3 - Conference article

AN - SCOPUS:0030393798

SN - 0163-1918

SP - 211

EP - 214

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - Proceedings of the 1996 IEEE International Electron Devices Meeting

Y2 - 8 December 1996 through 11 December 1996

ER -

A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs

Abstract

ASJC Scopus subject areas

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