A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Shiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong Kha Pham

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.

LanguageEnglish
Title of host publication2014 IEEE Hot Chips 26 Symposium, HCS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467388832
DOIs
StatePublished - 2016 May 25
Event26th IEEE Hot Chips Symposium, HCS 2014 - Cupertino, United States
Duration: 2014 Aug 102014 Aug 12

Other

Other26th IEEE Hot Chips Symposium, HCS 2014
CountryUnited States
CityCupertino
Period14/8/1014/8/12

Fingerprint

Program processors
Sleep

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Kamohara, S., Sugii, N., Ishibashi, K., Usami, K., Amano, H., Kobayashi, K., & Pham, C. K. (2016). A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. In 2014 IEEE Hot Chips 26 Symposium, HCS 2014 [7478838] Institute of Electrical and Electronics Engineers Inc.. DOI: 10.1109/HOTCHIPS.2014.7478838

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. / Kamohara, Shiro; Sugii, Nobuyuki; Ishibashi, Koichiro; Usami, Kimiyoshi; Amano, Hideharu; Kobayashi, Kazutoshi; Pham, Cong Kha.

2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc., 2016. 7478838.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kamohara, S, Sugii, N, Ishibashi, K, Usami, K, Amano, H, Kobayashi, K & Pham, CK 2016, A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. in 2014 IEEE Hot Chips 26 Symposium, HCS 2014., 7478838, Institute of Electrical and Electronics Engineers Inc., 26th IEEE Hot Chips Symposium, HCS 2014, Cupertino, United States, 14/8/10. DOI: 10.1109/HOTCHIPS.2014.7478838
Kamohara S, Sugii N, Ishibashi K, Usami K, Amano H, Kobayashi K et al. A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. In 2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc.2016. 7478838. Available from, DOI: 10.1109/HOTCHIPS.2014.7478838
Kamohara, Shiro ; Sugii, Nobuyuki ; Ishibashi, Koichiro ; Usami, Kimiyoshi ; Amano, Hideharu ; Kobayashi, Kazutoshi ; Pham, Cong Kha. / A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. 2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc., 2016.
@inproceedings{831b466bbd184243a587f9b265fec4eb,
title = "A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode",
abstract = "Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.",
author = "Shiro Kamohara and Nobuyuki Sugii and Koichiro Ishibashi and Kimiyoshi Usami and Hideharu Amano and Kazutoshi Kobayashi and Pham, {Cong Kha}",
year = "2016",
month = "5",
day = "25",
doi = "10.1109/HOTCHIPS.2014.7478838",
language = "English",
booktitle = "2014 IEEE Hot Chips 26 Symposium, HCS 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",

}

TY - GEN

T1 - A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

AU - Kamohara,Shiro

AU - Sugii,Nobuyuki

AU - Ishibashi,Koichiro

AU - Usami,Kimiyoshi

AU - Amano,Hideharu

AU - Kobayashi,Kazutoshi

AU - Pham,Cong Kha

PY - 2016/5/25

Y1 - 2016/5/25

N2 - Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.

AB - Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.

UR - http://www.scopus.com/inward/record.url?scp=84982788091&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84982788091&partnerID=8YFLogxK

U2 - 10.1109/HOTCHIPS.2014.7478838

DO - 10.1109/HOTCHIPS.2014.7478838

M3 - Conference contribution

BT - 2014 IEEE Hot Chips 26 Symposium, HCS 2014

PB - Institute of Electrical and Electronics Engineers Inc.

ER -