A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Shiro Kamohara; Nobuyuki Sugii; Koichiro Ishibashi; Kimiyoshi Usami; Hideharu Amano; Kazutoshi Kobayashi; Cong Kha Pham

doi:10.1109/HOTCHIPS.2014.7478838

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Shiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong Kha Pham

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.

Original language	English
Title of host publication	2014 IEEE Hot Chips 26 Symposium, HCS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467388832
DOIs	https://doi.org/10.1109/HOTCHIPS.2014.7478838
Publication status	Published - 2014 May 25
Event	26th IEEE Hot Chips Symposium, HCS 2014 - Cupertino, United States Duration: 2014 Aug 10 → 2014 Aug 12

Publication series

Name	2014 IEEE Hot Chips 26 Symposium, HCS 2014

Other

Other	26th IEEE Hot Chips Symposium, HCS 2014
Country/Territory	United States
City	Cupertino
Period	14/8/10 → 14/8/12

ASJC Scopus subject areas

Hardware and Architecture
Computer Networks and Communications

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10.1109/HOTCHIPS.2014.7478838

Cite this

Kamohara, S., Sugii, N., Ishibashi, K., Usami, K., Amano, H., Kobayashi, K., & Pham, C. K. (2014). A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. In 2014 IEEE Hot Chips 26 Symposium, HCS 2014 [7478838] (2014 IEEE Hot Chips 26 Symposium, HCS 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HOTCHIPS.2014.7478838

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. / Kamohara, Shiro; Sugii, Nobuyuki; Ishibashi, Koichiro; Usami, Kimiyoshi; Amano, Hideharu; Kobayashi, Kazutoshi; Pham, Cong Kha.

2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 7478838 (2014 IEEE Hot Chips 26 Symposium, HCS 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kamohara, S, Sugii, N, Ishibashi, K, Usami, K, Amano, H, Kobayashi, K & Pham, CK 2014, A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. in 2014 IEEE Hot Chips 26 Symposium, HCS 2014., 7478838, 2014 IEEE Hot Chips 26 Symposium, HCS 2014, Institute of Electrical and Electronics Engineers Inc., 26th IEEE Hot Chips Symposium, HCS 2014, Cupertino, United States, 14/8/10. https://doi.org/10.1109/HOTCHIPS.2014.7478838

Kamohara S, Sugii N, Ishibashi K, Usami K, Amano H, Kobayashi K et al. A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. In 2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 7478838. (2014 IEEE Hot Chips 26 Symposium, HCS 2014). https://doi.org/10.1109/HOTCHIPS.2014.7478838

Kamohara, Shiro ; Sugii, Nobuyuki ; Ishibashi, Koichiro ; Usami, Kimiyoshi ; Amano, Hideharu ; Kobayashi, Kazutoshi ; Pham, Cong Kha. / A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. 2014 IEEE Hot Chips 26 Symposium, HCS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 IEEE Hot Chips 26 Symposium, HCS 2014).

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abstract = "Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.",

author = "Shiro Kamohara and Nobuyuki Sugii and Koichiro Ishibashi and Kimiyoshi Usami and Hideharu Amano and Kazutoshi Kobayashi and Pham, {Cong Kha}",

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A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

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