A robust embedded ladder-oxide/Cu multilevel interconnect technology for 0.13 μm complementary metal oxide semiconductor generation

Noriaki Oda, Shinya Ito, Toshiyuki Takewaki, Kazutoshi Shiba, Hiroyuki Kunishima, Nobuo Hironaga, Ichiro Honma, Hiroaki Nanba, Shinji Yokogawa, Akiko Kameyama, Takayuki Goto, Tatsuya Usami, Koichi Ohto, Akira Kubo, Mieko Suzuki, Yoshiaki Yamamoto, Susumu Watanabe, Kenta Yamada, Masahiro Ikeda, Kazuyoshi UenoTadahiko Horiuchi

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

A robust embedded ladder-oxide {k = 2.9)/copper (Cu) multilevel interconnect is demonstrated for 0.13 μm complementary metal oxide semiconductor (CMOS) generation. A stable ladder-oxide intermetal dielectric (IMD) is integrated by the Cu metallization with a minimum wiring pitch of 0.34 μm, and a single damascene (S/D) Cu-plug structure is applied. An 18% reduction in wiring capacitance is obtained compared with that in SiO 2 IMDs. The superior controllability of metal thickness by the S/D process enables us to enhance the MPU maximum frequency easily. The stress-migration lifetime of vias on wide metals for the S/D Cu-plug structure is longer than that for a dual damascene (D/D) structure. Reliability test results such as electromigration (EM), the temperature dependant dielectric breakdown (TDDB) of Cu interconnects, and pressure cooker test (PCT) results are acceptable. Moreover, a high flexibility in a thermal design is obtained.

Original languageEnglish
Pages (from-to)954-961
Number of pages8
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume46
Issue number3 A
DOIs
Publication statusPublished - 2007 Mar 8

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wiring
Ladders
plugs
ladders
CMOS
Electric wiring
Oxides
oxides
electromigration
controllability
Metals
metals
flexibility
Electromigration
breakdown
capacitance
Metallizing
Controllability
Electric breakdown
copper

Keywords

  • 0.13μm node
  • CMOS
  • Complementary metal oxide semiconductor
  • Copper plug
  • Cu interconnect
  • Ladder-oxide
  • Low-k
  • Single damascene

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

A robust embedded ladder-oxide/Cu multilevel interconnect technology for 0.13 μm complementary metal oxide semiconductor generation. / Oda, Noriaki; Ito, Shinya; Takewaki, Toshiyuki; Shiba, Kazutoshi; Kunishima, Hiroyuki; Hironaga, Nobuo; Honma, Ichiro; Nanba, Hiroaki; Yokogawa, Shinji; Kameyama, Akiko; Goto, Takayuki; Usami, Tatsuya; Ohto, Koichi; Kubo, Akira; Suzuki, Mieko; Yamamoto, Yoshiaki; Watanabe, Susumu; Yamada, Kenta; Ikeda, Masahiro; Ueno, Kazuyoshi; Horiuchi, Tadahiko.

In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 46, No. 3 A, 08.03.2007, p. 954-961.

Research output: Contribution to journalArticle

Oda, N, Ito, S, Takewaki, T, Shiba, K, Kunishima, H, Hironaga, N, Honma, I, Nanba, H, Yokogawa, S, Kameyama, A, Goto, T, Usami, T, Ohto, K, Kubo, A, Suzuki, M, Yamamoto, Y, Watanabe, S, Yamada, K, Ikeda, M, Ueno, K & Horiuchi, T 2007, 'A robust embedded ladder-oxide/Cu multilevel interconnect technology for 0.13 μm complementary metal oxide semiconductor generation', Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, vol. 46, no. 3 A, pp. 954-961. https://doi.org/10.1143/JJAP.46.954
Oda, Noriaki ; Ito, Shinya ; Takewaki, Toshiyuki ; Shiba, Kazutoshi ; Kunishima, Hiroyuki ; Hironaga, Nobuo ; Honma, Ichiro ; Nanba, Hiroaki ; Yokogawa, Shinji ; Kameyama, Akiko ; Goto, Takayuki ; Usami, Tatsuya ; Ohto, Koichi ; Kubo, Akira ; Suzuki, Mieko ; Yamamoto, Yoshiaki ; Watanabe, Susumu ; Yamada, Kenta ; Ikeda, Masahiro ; Ueno, Kazuyoshi ; Horiuchi, Tadahiko. / A robust embedded ladder-oxide/Cu multilevel interconnect technology for 0.13 μm complementary metal oxide semiconductor generation. In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 2007 ; Vol. 46, No. 3 A. pp. 954-961.
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