A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction

T. Ishitani, K. Tansho, N. Miyahara, S. Kubota, S. Kato

Research output: Contribution to journalArticlepeer-review

23 Citations (Scopus)
Original languageEnglish
JournalIEEE Journal of Solid State Circuits
Publication statusPublished - 1987 Aug 1

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