A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction

T. Ishitani, K. Tansho, N. Miyahara, S. Kubota, S. Kato

Research output: Contribution to journal › Article

23 Citations (Scopus)
Original languageEnglish
JournalIEEE Journal of Solid State Circuits
Publication statusPublished - 1987 Aug 1

Cite this

A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction. / Ishitani, T.; Tansho, K.; Miyahara, N.; Kubota, S.; Kato, S.

In: IEEE Journal of Solid State Circuits, 01.08.1987.

Research output: Contribution to journal › Article

Ishitani, T, Tansho, K, Miyahara, N, Kubota, S & Kato, S 1987, 'A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction', IEEE Journal of Solid State Circuits.
Ishitani T, Tansho K, Miyahara N, Kubota S, Kato S. A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction. IEEE Journal of Solid State Circuits. 1987 Aug 1.
Ishitani, T. ; Tansho, K. ; Miyahara, N. ; Kubota, S. ; Kato, S. / A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction. In: IEEE Journal of Solid State Circuits. 1987.
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