| Original language | English |
|---|---|
| Journal | IEEE Journal of Solid State Circuits |
| Publication status | Published - 1987 Aug 1 |
Cite this
Ishitani, T., Tansho, K., Miyahara, N., Kubota, S., & Kato, S. (1987). A Scarce State Transition Viterbi Decoder VLSI for Bit Error Correction. IEEE Journal of Solid State Circuits.