A0.1 um Self-Aligned-Gate GaAs MESFETwith Multilayer Interconnection Structure for Ultra-High-Speed Ics

Masami Tokumitsu, Makoto Hirano, Taiichi Otsuji, Satoru Yamaguchi, Kimitoshi Yamazaki

    Research output: Contribution to journalArticle

    16 Citations (Scopus)
    Original languageEnglish
    Pages (from-to)211-214
    JournalIEEE IEDM Tch.Dig.
    Publication statusPublished - 1996 Apr 1

    Cite this

    Tokumitsu, M., Hirano, M., Otsuji, T., Yamaguchi, S., & Yamazaki, K. (1996). A0.1 um Self-Aligned-Gate GaAs MESFETwith Multilayer Interconnection Structure for Ultra-High-Speed Ics. IEEE IEDM Tch.Dig., 211-214.

    A0.1 um Self-Aligned-Gate GaAs MESFETwith Multilayer Interconnection Structure for Ultra-High-Speed Ics. / Tokumitsu, Masami; Hirano, Makoto; Otsuji, Taiichi; Yamaguchi, Satoru; Yamazaki, Kimitoshi.

    In: IEEE IEDM Tch.Dig., 01.04.1996, p. 211-214.

    Research output: Contribution to journalArticle

    Tokumitsu, M, Hirano, M, Otsuji, T, Yamaguchi, S & Yamazaki, K 1996, 'A0.1 um Self-Aligned-Gate GaAs MESFETwith Multilayer Interconnection Structure for Ultra-High-Speed Ics', IEEE IEDM Tch.Dig., pp. 211-214.
    Tokumitsu, Masami ; Hirano, Makoto ; Otsuji, Taiichi ; Yamaguchi, Satoru ; Yamazaki, Kimitoshi. / A0.1 um Self-Aligned-Gate GaAs MESFETwith Multilayer Interconnection Structure for Ultra-High-Speed Ics. In: IEEE IEDM Tch.Dig. 1996 ; pp. 211-214.
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    AU - Yamaguchi, Satoru

    AU - Yamazaki, Kimitoshi

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