An accurate HJFET capacitance-voltage model for implementation with a circuit simulator

Noriaki Matsuno, Hitoshi Yano, Hikaru Hida, Tadashi Maeda

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

We present a new accurate HJFET capacitance model to implement with a circuit simulator. This is an analytical model that describes capacitance-voltage (C-V) characteristics over a wide supply voltage range. The model for a capacitance component due to two-dimensional electron gas (2-DEG) conduction is based on gradual channel approximation, and takes into account the gradual capacitance transition near the threshold voltage. It also takes into account the field dependence of the 2DEG mobility, which is very strong for deep sub-micron devices. The model for parasitic MESFET capacitance is based on the formula for a Schottky diode. Since the model consists of physical parameters, it provides feedback between the fabrication process and circuit design. The simulated results agree well with the measurements.

Original languageEnglish
Pages (from-to)373-378
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume44
Issue number3
DOIs
Publication statusPublished - 1997 Dec 1
Externally publishedYes

Keywords

  • Cad model
  • Circuit simulation
  • Gaas
  • Gate capacitance
  • HJFET

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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