An operating system guided fine-grained power gating control based on runtime characteristics of applications

Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki

Research output: Contribution to journalArticle

Abstract

Fine-grained power gating (FGPG) is a power-saving technique by switching off circuit blocks while the blocks are idle. Although FGPG can reduce power consumption without compromising computational performance, switching the power supply on and off causes energy overhead. To prevent power increase caused by the energy overhead, in our prior research we proposed an FGPG control method of the operating system(OS) based on pre-analyzing applications' power usage. However, modern computing systems have a wide variety of use cases and run many types of application; this makes it difficult to analyze the behavior of all these applications in advance. This paper therefore proposes a new FGPG control method without profiling application programs in advance. In the new proposed method, the OS monitors a circuit's idle interval periodically while application programs are running. The OS enables FGPG only if the interval time is long enough to reduce the power consumption. The experimental results in this paper show that the proposed method reduces power consumption by 9.8% on average and up to 17.2% at 25°C. The results also show that the proposed method achieves almost the same power-saving efficiency as the previous profile-based method.

LanguageEnglish
Pages926-935
Number of pages10
JournalIEICE Transactions on Electronics
VolumeE99C
Issue number8
DOIs
StatePublished - 2016 Aug 1

Fingerprint

Electric power utilization
Application programs
Computer monitors
Networks (circuits)

Keywords

  • Energy conservation
  • Microprocessor
  • Operating system
  • Power gating

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

An operating system guided fine-grained power gating control based on runtime characteristics of applications. / Koshiba, Atsushi; Sato, Mikiko; Usami, Kimiyoshi; Amano, Hideharu; Sakamoto, Ryuichi; Kondo, Masaaki; Nakamura, Hiroshi; Namiki, Mitaro.

In: IEICE Transactions on Electronics, Vol. E99C, No. 8, 01.08.2016, p. 926-935.

Research output: Contribution to journalArticle

Koshiba, A, Sato, M, Usami, K, Amano, H, Sakamoto, R, Kondo, M, Nakamura, H & Namiki, M 2016, 'An operating system guided fine-grained power gating control based on runtime characteristics of applications' IEICE Transactions on Electronics, vol E99C, no. 8, pp. 926-935. DOI: 10.1587/transele.E99.C.926
Koshiba, Atsushi ; Sato, Mikiko ; Usami, Kimiyoshi ; Amano, Hideharu ; Sakamoto, Ryuichi ; Kondo, Masaaki ; Nakamura, Hiroshi ; Namiki, Mitaro. / An operating system guided fine-grained power gating control based on runtime characteristics of applications. In: IEICE Transactions on Electronics. 2016 ; Vol. E99C, No. 8. pp. 926-935
@article{d793947778c54869ad319bd734bf7f29,
title = "An operating system guided fine-grained power gating control based on runtime characteristics of applications",
abstract = "Fine-grained power gating (FGPG) is a power-saving technique by switching off circuit blocks while the blocks are idle. Although FGPG can reduce power consumption without compromising computational performance, switching the power supply on and off causes energy overhead. To prevent power increase caused by the energy overhead, in our prior research we proposed an FGPG control method of the operating system(OS) based on pre-analyzing applications' power usage. However, modern computing systems have a wide variety of use cases and run many types of application; this makes it difficult to analyze the behavior of all these applications in advance. This paper therefore proposes a new FGPG control method without profiling application programs in advance. In the new proposed method, the OS monitors a circuit's idle interval periodically while application programs are running. The OS enables FGPG only if the interval time is long enough to reduce the power consumption. The experimental results in this paper show that the proposed method reduces power consumption by 9.8{\%} on average and up to 17.2{\%} at 25°C. The results also show that the proposed method achieves almost the same power-saving efficiency as the previous profile-based method.",
keywords = "Energy conservation, Microprocessor, Operating system, Power gating",
author = "Atsushi Koshiba and Mikiko Sato and Kimiyoshi Usami and Hideharu Amano and Ryuichi Sakamoto and Masaaki Kondo and Hiroshi Nakamura and Mitaro Namiki",
year = "2016",
month = "8",
day = "1",
doi = "10.1587/transele.E99.C.926",
language = "English",
volume = "E99C",
pages = "926--935",
journal = "IEICE Transactions on Electronics",
issn = "0916-8524",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "8",

}

TY - JOUR

T1 - An operating system guided fine-grained power gating control based on runtime characteristics of applications

AU - Koshiba,Atsushi

AU - Sato,Mikiko

AU - Usami,Kimiyoshi

AU - Amano,Hideharu

AU - Sakamoto,Ryuichi

AU - Kondo,Masaaki

AU - Nakamura,Hiroshi

AU - Namiki,Mitaro

PY - 2016/8/1

Y1 - 2016/8/1

N2 - Fine-grained power gating (FGPG) is a power-saving technique by switching off circuit blocks while the blocks are idle. Although FGPG can reduce power consumption without compromising computational performance, switching the power supply on and off causes energy overhead. To prevent power increase caused by the energy overhead, in our prior research we proposed an FGPG control method of the operating system(OS) based on pre-analyzing applications' power usage. However, modern computing systems have a wide variety of use cases and run many types of application; this makes it difficult to analyze the behavior of all these applications in advance. This paper therefore proposes a new FGPG control method without profiling application programs in advance. In the new proposed method, the OS monitors a circuit's idle interval periodically while application programs are running. The OS enables FGPG only if the interval time is long enough to reduce the power consumption. The experimental results in this paper show that the proposed method reduces power consumption by 9.8% on average and up to 17.2% at 25°C. The results also show that the proposed method achieves almost the same power-saving efficiency as the previous profile-based method.

AB - Fine-grained power gating (FGPG) is a power-saving technique by switching off circuit blocks while the blocks are idle. Although FGPG can reduce power consumption without compromising computational performance, switching the power supply on and off causes energy overhead. To prevent power increase caused by the energy overhead, in our prior research we proposed an FGPG control method of the operating system(OS) based on pre-analyzing applications' power usage. However, modern computing systems have a wide variety of use cases and run many types of application; this makes it difficult to analyze the behavior of all these applications in advance. This paper therefore proposes a new FGPG control method without profiling application programs in advance. In the new proposed method, the OS monitors a circuit's idle interval periodically while application programs are running. The OS enables FGPG only if the interval time is long enough to reduce the power consumption. The experimental results in this paper show that the proposed method reduces power consumption by 9.8% on average and up to 17.2% at 25°C. The results also show that the proposed method achieves almost the same power-saving efficiency as the previous profile-based method.

KW - Energy conservation

KW - Microprocessor

KW - Operating system

KW - Power gating

UR - http://www.scopus.com/inward/record.url?scp=84983252776&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84983252776&partnerID=8YFLogxK

U2 - 10.1587/transele.E99.C.926

DO - 10.1587/transele.E99.C.926

M3 - Article

VL - E99C

SP - 926

EP - 935

JO - IEICE Transactions on Electronics

T2 - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

SN - 0916-8524

IS - 8

ER -