An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

Hayate Okuhara, Kuniaki Kitamori, Yu Fujita, Kimiyoshi Usami, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.

Original languageEnglish
Title of host publicationProceedings of the International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages207-212
Number of pages6
Volume2015-September
ISBN (Print)9781467380096
DOIs
Publication statusPublished - 2015 Sep 21
Event20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015 - Rome, Italy
Duration: 2015 Jul 222015 Jul 24

Other

Other20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015
CountryItaly
CityRome
Period15/7/2215/7/24

Fingerprint

Bias voltage
Silicon
Controllers
Oxides
Electric potential
Electric power utilization
Data storage equipment

Keywords

  • Body bias control
  • FD-SOI
  • Low power design
  • Micro-controller
  • SOTB

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Okuhara, H., Kitamori, K., Fujita, Y., Usami, K., & Amano, H. (2015). An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. In Proceedings of the International Symposium on Low Power Electronics and Design (Vol. 2015-September, pp. 207-212). [7273515] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2015.7273515

An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. / Okuhara, Hayate; Kitamori, Kuniaki; Fujita, Yu; Usami, Kimiyoshi; Amano, Hideharu.

Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2015-September Institute of Electrical and Electronics Engineers Inc., 2015. p. 207-212 7273515.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Okuhara, H, Kitamori, K, Fujita, Y, Usami, K & Amano, H 2015, An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. in Proceedings of the International Symposium on Low Power Electronics and Design. vol. 2015-September, 7273515, Institute of Electrical and Electronics Engineers Inc., pp. 207-212, 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, Rome, Italy, 15/7/22. https://doi.org/10.1109/ISLPED.2015.7273515
Okuhara H, Kitamori K, Fujita Y, Usami K, Amano H. An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. In Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2015-September. Institute of Electrical and Electronics Engineers Inc. 2015. p. 207-212. 7273515 https://doi.org/10.1109/ISLPED.2015.7273515
Okuhara, Hayate ; Kitamori, Kuniaki ; Fujita, Yu ; Usami, Kimiyoshi ; Amano, Hideharu. / An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2015-September Institute of Electrical and Electronics Engineers Inc., 2015. pp. 207-212
@inproceedings{75f27d0ee2024a6fa6831b51c2b3bcf4,
title = "An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET",
abstract = "Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6{\%} at maximum, and it can save at most 73.1{\%} of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.",
keywords = "Body bias control, FD-SOI, Low power design, Micro-controller, SOTB",
author = "Hayate Okuhara and Kuniaki Kitamori and Yu Fujita and Kimiyoshi Usami and Hideharu Amano",
year = "2015",
month = "9",
day = "21",
doi = "10.1109/ISLPED.2015.7273515",
language = "English",
isbn = "9781467380096",
volume = "2015-September",
pages = "207--212",
booktitle = "Proceedings of the International Symposium on Low Power Electronics and Design",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

AU - Okuhara, Hayate

AU - Kitamori, Kuniaki

AU - Fujita, Yu

AU - Usami, Kimiyoshi

AU - Amano, Hideharu

PY - 2015/9/21

Y1 - 2015/9/21

N2 - Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.

AB - Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.

KW - Body bias control

KW - FD-SOI

KW - Low power design

KW - Micro-controller

KW - SOTB

UR - http://www.scopus.com/inward/record.url?scp=84958535572&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84958535572&partnerID=8YFLogxK

U2 - 10.1109/ISLPED.2015.7273515

DO - 10.1109/ISLPED.2015.7273515

M3 - Conference contribution

AN - SCOPUS:84958535572

SN - 9781467380096

VL - 2015-September

SP - 207

EP - 212

BT - Proceedings of the International Symposium on Low Power Electronics and Design

PB - Institute of Electrical and Electronics Engineers Inc.

ER -