An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

Hayate Okuhara; Kuniaki Kitamori; Yu Fujita; Kimiyoshi Usami; Hideharu Amano

doi:10.1109/ISLPED.2015.7273515

An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

Hayate Okuhara, Kuniaki Kitamori, Yu Fujita, Kimiyoshi Usami, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.

Original language	English
Title of host publication	Proceedings of the International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	207-212
Number of pages	6
Volume	2015-September
ISBN (Print)	9781467380096
DOIs	https://doi.org/10.1109/ISLPED.2015.7273515
Publication status	Published - 2015 Sept 21
Event	20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015 - Rome, Italy Duration: 2015 Jul 22 → 2015 Jul 24

Other

Other	20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015
Country/Territory	Italy
City	Rome
Period	15/7/22 → 15/7/24

Keywords

Body bias control
FD-SOI
Low power design
Micro-controller
SOTB

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1109/ISLPED.2015.7273515

Cite this

Okuhara, H., Kitamori, K., Fujita, Y., Usami, K., & Amano, H. (2015). An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. In Proceedings of the International Symposium on Low Power Electronics and Design (Vol. 2015-September, pp. 207-212). [7273515] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2015.7273515

An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. / Okuhara, Hayate; Kitamori, Kuniaki; Fujita, Yu et al.

Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2015-September Institute of Electrical and Electronics Engineers Inc., 2015. p. 207-212 7273515.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Okuhara, H, Kitamori, K, Fujita, Y, Usami, K & Amano, H 2015, An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. in Proceedings of the International Symposium on Low Power Electronics and Design. vol. 2015-September, 7273515, Institute of Electrical and Electronics Engineers Inc., pp. 207-212, 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, Rome, Italy, 15/7/22. https://doi.org/10.1109/ISLPED.2015.7273515

Okuhara H, Kitamori K, Fujita Y, Usami K, Amano H. An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET. In Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2015-September. Institute of Electrical and Electronics Engineers Inc. 2015. p. 207-212. 7273515 doi: 10.1109/ISLPED.2015.7273515

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AU - Amano, Hideharu

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AB - Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.

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An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

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