An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)

Tadashi Maeda; Keiichi Numata; Masahiro Fujii; Masatoshi Tokushima; Shigeki Wada; Muneo Fukaishi; Masaoki Ishikawa

doi:10.1109/4.535426

An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)

Tadashi Maeda, Keiichi Numata, Masahiro Fujii, Masatoshi Tokushima, Shigeki Wada, Muneo Fukaishi, Masaoki Ishikawa

Research output: Contribution to journal › Article

10 Citations (Scopus)

Abstract

The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption at 10 Gb/s is 1/3 that of the lowest reported value for D-FF's. A divider using the QD-FF configuration operates at a clock frequency of 16 GHz with a power consumption of 2.4 mW at a supply voltage of 0.6 V. The power-delay product is about one-third that of the lowest reported value for dividers.

Original language	English
Pages (from-to)	1361-1363
Number of pages	3
Journal	IEEE Journal of Solid-State Circuits
Volume	31
Issue number	9
DOIs	https://doi.org/10.1109/4.535426
Publication status	Published - 1996 Sep
Externally published	Yes

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ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

Maeda, T., Numata, K., Fujii, M., Tokushima, M., Wada, S., Fukaishi, M., & Ishikawa, M. (1996). An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF). IEEE Journal of Solid-State Circuits, 31(9), 1361-1363. https://doi.org/10.1109/4.535426

@article{9412942280a84b228ebd08b3a7f74ea3,

title = "An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)",

abstract = "The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption at 10 Gb/s is 1/3 that of the lowest reported value for D-FF's. A divider using the QD-FF configuration operates at a clock frequency of 16 GHz with a power consumption of 2.4 mW at a supply voltage of 0.6 V. The power-delay product is about one-third that of the lowest reported value for dividers.",

author = "Tadashi Maeda and Keiichi Numata and Masahiro Fujii and Masatoshi Tokushima and Shigeki Wada and Muneo Fukaishi and Masaoki Ishikawa",

year = "1996",

month = "9",

doi = "10.1109/4.535426",

language = "English",

volume = "31",

pages = "1361--1363",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)

AU - Maeda, Tadashi

AU - Numata, Keiichi

AU - Fujii, Masahiro

AU - Tokushima, Masatoshi

AU - Wada, Shigeki

AU - Fukaishi, Muneo

AU - Ishikawa, Masaoki

PY - 1996/9

Y1 - 1996/9

N2 - The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption at 10 Gb/s is 1/3 that of the lowest reported value for D-FF's. A divider using the QD-FF configuration operates at a clock frequency of 16 GHz with a power consumption of 2.4 mW at a supply voltage of 0.6 V. The power-delay product is about one-third that of the lowest reported value for dividers.

AB - The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption at 10 Gb/s is 1/3 that of the lowest reported value for D-FF's. A divider using the QD-FF configuration operates at a clock frequency of 16 GHz with a power consumption of 2.4 mW at a supply voltage of 0.6 V. The power-delay product is about one-third that of the lowest reported value for dividers.

UR - http://www.scopus.com/inward/record.url?scp=0030242774&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030242774&partnerID=8YFLogxK

U2 - 10.1109/4.535426

DO - 10.1109/4.535426

M3 - Article

AN - SCOPUS:0030242774

VL - 31

SP - 1361

EP - 1363

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 9

ER -

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10.1109/4.535426