Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs

H. Takayanagi, H. Nakano, Kazushige Horio

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Two-dimensional transient analyses of GaN MESFETs are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are included. Quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that so called current collapse or current reduction is more pronounced for a case with higher acceptor density in the buffer layer, because trapping effects become more significant. It is also shown that the current reduction is more pronounced when the drain voltage is lowered from a higher drain bias during turn-on.

Original languageEnglish
Title of host publicationGAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium
Pages149-152
Number of pages4
Volume2005
Publication statusPublished - 2005
EventGAAS 2005 - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium - Paris
Duration: 2005 Oct 32005 Oct 4

Other

OtherGAAS 2005 - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium
CityParis
Period05/10/305/10/4

Fingerprint

Buffer layers
Field effect transistors
Electric potential
Compensation and Redress

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Takayanagi, H., Nakano, H., & Horio, K. (2005). Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs. In GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium (Vol. 2005, pp. 149-152). [1605116]

Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs. / Takayanagi, H.; Nakano, H.; Horio, Kazushige.

GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium. Vol. 2005 2005. p. 149-152 1605116.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Takayanagi, H, Nakano, H & Horio, K 2005, Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs. in GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium. vol. 2005, 1605116, pp. 149-152, GAAS 2005 - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium, Paris, 05/10/3.
Takayanagi H, Nakano H, Horio K. Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs. In GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium. Vol. 2005. 2005. p. 149-152. 1605116
Takayanagi, H. ; Nakano, H. ; Horio, Kazushige. / Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs. GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium. Vol. 2005 2005. pp. 149-152
@inproceedings{949e6eeaa215443d9463df9ea9b5b6ce,
title = "Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs",
abstract = "Two-dimensional transient analyses of GaN MESFETs are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are included. Quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that so called current collapse or current reduction is more pronounced for a case with higher acceptor density in the buffer layer, because trapping effects become more significant. It is also shown that the current reduction is more pronounced when the drain voltage is lowered from a higher drain bias during turn-on.",
author = "H. Takayanagi and H. Nakano and Kazushige Horio",
year = "2005",
language = "English",
isbn = "8890201207",
volume = "2005",
pages = "149--152",
booktitle = "GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium",

}

TY - GEN

T1 - Analysis of buffer-trapping effects on current reduction and pulsed I-V curves of GaN FETs

AU - Takayanagi, H.

AU - Nakano, H.

AU - Horio, Kazushige

PY - 2005

Y1 - 2005

N2 - Two-dimensional transient analyses of GaN MESFETs are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are included. Quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that so called current collapse or current reduction is more pronounced for a case with higher acceptor density in the buffer layer, because trapping effects become more significant. It is also shown that the current reduction is more pronounced when the drain voltage is lowered from a higher drain bias during turn-on.

AB - Two-dimensional transient analyses of GaN MESFETs are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are included. Quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that so called current collapse or current reduction is more pronounced for a case with higher acceptor density in the buffer layer, because trapping effects become more significant. It is also shown that the current reduction is more pronounced when the drain voltage is lowered from a higher drain bias during turn-on.

UR - http://www.scopus.com/inward/record.url?scp=33847252614&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33847252614&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:33847252614

SN - 8890201207

SN - 9788890201202

VL - 2005

SP - 149

EP - 152

BT - GAAS 2005 Conference Proceedings - 13th European Gallium Arsenide and Other Compound Semiconductors Application Symposium

ER -