Analysis of removal of surface-state-related lags and current slump in GaAs FETs

H. Hafiz, Masatoshi Kumeno, Kazushige Horio

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that drain lag and current slump because of surface states are reduced by introducing a field plate longer than the surface-state region. Dependence of drain lag, gate lag, and current slump on the field-plate length and SiO2 passivation layer thickness is studied, indicating that the lags and current slump can be completely removed in a case with a thin SiO2 layer.

Original languageEnglish
Article number6603270
Pages (from-to)1361-1363
Number of pages3
JournalIEEE Electron Device Letters
Volume34
Issue number11
DOIs
Publication statusPublished - 2013

Fingerprint

Surface states
Field effect transistors
Passivation
Transient analysis
Electric potential
gallium arsenide

Keywords

  • 2-D analysis
  • current slump
  • drain lag
  • GaAs field effect transistor (FET)
  • gate lag
  • surface state

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Analysis of removal of surface-state-related lags and current slump in GaAs FETs. / Hafiz, H.; Kumeno, Masatoshi; Horio, Kazushige.

In: IEEE Electron Device Letters, Vol. 34, No. 11, 6603270, 2013, p. 1361-1363.

Research output: Contribution to journalArticle

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