Analysis of surface and substrate deep-trap effects on gate-lag phenomena in GaAs MESFETs

Kazushige Horio, T. Yamada, A. Wakabayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This study theoretically demonstrates that the gate-lag in recessed-gate GaAs MESFETs may not be completely suppressed when the deep-acceptor-like surface state acts as a hole trap, because the thickness of surface depletion layer can change much by the applied gate voltage. Abnormal current overshoot arise due to deep traps in the substrate when the off-state gate voltage is deeply negative.

Original languageEnglish
Title of host publicationGaAs Reliability Workshop, Proceedings
Place of PublicationPiscataway, NJ, United States
PublisherIEEE
Pages101-103
Number of pages3
Publication statusPublished - 1997
EventProceedings of the 1997 GaAs Reliability Workshop - Anaheim, CA, USA
Duration: 1997 Oct 121997 Oct 12

Other

OtherProceedings of the 1997 GaAs Reliability Workshop
CityAnaheim, CA, USA
Period97/10/1297/10/12

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ASJC Scopus subject areas

  • Materials Science(all)
  • Physics and Astronomy(all)

Cite this

Horio, K., Yamada, T., & Wakabayashi, A. (1997). Analysis of surface and substrate deep-trap effects on gate-lag phenomena in GaAs MESFETs. In GaAs Reliability Workshop, Proceedings (pp. 101-103). Piscataway, NJ, United States: IEEE.