Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

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The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed fOPmax is limited to fT sin{π/(nG + 1)}/2nFO, where fT is the cut-off frequency, nG is the number of critical path gates, and nFO is the fan-out number. In contrast, the influence of maximum frequency of oscillation fmax on fOPmax is small compared with that for fT, but an FET with a higher fmax can reduce the power consumption. These analytical results agree well with the experimental results.

Original languageEnglish
Pages (from-to)807-811
Number of pages5
JournalSolid-State Electronics
Issue number6
Publication statusPublished - 1997 Jun


ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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