Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

T. Maeda

doi:10.1016/S0038-1101(97)00049-X

Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

T. Maeda

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed f_OPmax is limited to f_T sin{π/(n_G + 1)}/2n_FO, where f_T is the cut-off frequency, n_G is the number of critical path gates, and n_FO is the fan-out number. In contrast, the influence of maximum frequency of oscillation f_max on f_OPmax is small compared with that for f_T, but an FET with a higher f_max can reduce the power consumption. These analytical results agree well with the experimental results.

Original language	English
Pages (from-to)	807-811
Number of pages	5
Journal	Solid-State Electronics
Volume	41
Issue number	6
DOIs	https://doi.org/10.1016/S0038-1101(97)00049-X
Publication status	Published - 1997 Jun
Externally published	Yes

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Access to Document

10.1016/S0038-1101(97)00049-X

Cite this

@article{2de5bfd5288a4db8ab56cd2aacd9915a,

title = "Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops",

abstract = "The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed fOPmax is limited to fT sin{π/(nG + 1)}/2nFO, where fT is the cut-off frequency, nG is the number of critical path gates, and nFO is the fan-out number. In contrast, the influence of maximum frequency of oscillation fmax on fOPmax is small compared with that for fT, but an FET with a higher fmax can reduce the power consumption. These analytical results agree well with the experimental results.",

author = "T. Maeda",

year = "1997",

month = jun,

doi = "10.1016/S0038-1101(97)00049-X",

language = "English",

volume = "41",

pages = "807--811",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Elsevier Limited",

number = "6",

}

TY - JOUR

T1 - Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

AU - Maeda, T.

PY - 1997/6

Y1 - 1997/6

N2 - The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed fOPmax is limited to fT sin{π/(nG + 1)}/2nFO, where fT is the cut-off frequency, nG is the number of critical path gates, and nFO is the fan-out number. In contrast, the influence of maximum frequency of oscillation fmax on fOPmax is small compared with that for fT, but an FET with a higher fmax can reduce the power consumption. These analytical results agree well with the experimental results.

AB - The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed fOPmax is limited to fT sin{π/(nG + 1)}/2nFO, where fT is the cut-off frequency, nG is the number of critical path gates, and nFO is the fan-out number. In contrast, the influence of maximum frequency of oscillation fmax on fOPmax is small compared with that for fT, but an FET with a higher fmax can reduce the power consumption. These analytical results agree well with the experimental results.

UR - http://www.scopus.com/inward/record.url?scp=0031170014&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031170014&partnerID=8YFLogxK

U2 - 10.1016/S0038-1101(97)00049-X

DO - 10.1016/S0038-1101(97)00049-X

M3 - Article

AN - SCOPUS:0031170014

SN - 0038-1101

VL - 41

SP - 807

EP - 811

JO - Solid-State Electronics

JF - Solid-State Electronics

IS - 6

ER -

Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

Abstract

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this