Anti-resonance peak damping of PDN impedance by on-board snubber circuits

You Iijima, Masataka Matsumura, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Simultaneous switching noise (SSN) is a serious design issue to stabilize logic operation and to reduce electromagnetic interference (EMI) in advanced CMOS circuits and systems. Ringing frequency observed in the SSN waveforms is strongly related to the anti-resonance peak frequency of total PDN impedance. In this paper, on-board snubber (RC series circuit) was investigated to improve power supply integrity in a FPGA (Field Programmable Gate Array) board. The on-board snubber circuits was added just at the beneath of the power supply terminals of the FPGA to effectively suppress the anti-resonance peak of the total PDN impedance. Design space to damp the anti-resonance peak was examined. In particular, the values of on-board capacitance and resistance of snubber circuit has been examined by using circuit analysis tool and field solver.

Original languageEnglish
Title of host publication2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012
Pages127-130
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012 - Taipei
Duration: 2012 Dec 92012 Dec 11

Other

Other2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012
CityTaipei
Period12/12/912/12/11

Fingerprint

Damping
Networks (circuits)
Field programmable gate arrays (FPGA)
Signal interference
Electric network analysis
Capacitance

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Iijima, Y., Matsumura, M., & Sudo, T. (2012). Anti-resonance peak damping of PDN impedance by on-board snubber circuits. In 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012 (pp. 127-130). [6469429] https://doi.org/10.1109/EDAPS.2012.6469429

Anti-resonance peak damping of PDN impedance by on-board snubber circuits. / Iijima, You; Matsumura, Masataka; Sudo, Toshio.

2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012. 2012. p. 127-130 6469429.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iijima, Y, Matsumura, M & Sudo, T 2012, Anti-resonance peak damping of PDN impedance by on-board snubber circuits. in 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012., 6469429, pp. 127-130, 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012, Taipei, 12/12/9. https://doi.org/10.1109/EDAPS.2012.6469429
Iijima Y, Matsumura M, Sudo T. Anti-resonance peak damping of PDN impedance by on-board snubber circuits. In 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012. 2012. p. 127-130. 6469429 https://doi.org/10.1109/EDAPS.2012.6469429
Iijima, You ; Matsumura, Masataka ; Sudo, Toshio. / Anti-resonance peak damping of PDN impedance by on-board snubber circuits. 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012. 2012. pp. 127-130
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