CODE OPTIMIZATION OF DIGITAL NETWORKS FOR SIGNAL PROCESSORS.

Haruyuki Sakamoto, Eiji Watanabe, Akinori Nishihara

Research output: Contribution to journalConference article

Abstract

A new computable ordering of digital networks is proposed. The method is particularly efficient when a network is implemented on a signal processor (SP). The algorithm is based on the depth-first search and the optimal code generation algorithm for binary trees. A new high-level language for describing digital networks is also proposed. A program written in the language is compiled using the proposed ordering algorithm to generate an efficient assembler program for an SP.

Original languageEnglish
Pages (from-to)1403-1406
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Publication statusPublished - 1985 Dec 1

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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