Abstract
High-speed, high-density CMOS VLSI devices have powerful output buffers to charge a load capacitance quickly, which causes large switching noise on the power/ground lines. Furthermore, the equivalent impedance of the output buffer becomes lower than the characteristic impedance of the transmission line on a board, which induces complicated phenomena, including ringing noise. These problems are discussed, and the electrical characteristics of a 348-pin QFP (quad flat package) developed for a 1-micron, 129-K gate CMOS gate array is described. The factors that determine switching noise were investigated by a simulation that represents the packaging environment. A test chip for evaluating the switching noise was designed and used to characterize the 348-pin QFP. Disagreement between measured data and simulation results remains to be investigated.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - Electronic Components and Technology Conference |
| Editors | Anon |
| Publisher | Publ by IEEE |
| Pages | 531-538 |
| Number of pages | 8 |
| Publication status | Published - 1989 |
| Event | 39th Electronic Components - Houston, TX, USA Duration: 1989 May 22 → 1989 May 24 |
Other
| Other | 39th Electronic Components |
|---|---|
| City | Houston, TX, USA |
| Period | 89/5/22 → 89/5/24 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Considerations on package design for high speed and high pin count CMOS devices. / Sudo, Toshio; Mori, Toshiaki; Yoshimori, Takashi.
Proceedings - Electronic Components and Technology Conference. ed. / Anon. Publ by IEEE, 1989. p. 531-538.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Considerations on package design for high speed and high pin count CMOS devices
AU - Sudo, Toshio
AU - Mori, Toshiaki
AU - Yoshimori, Takashi
PY - 1989
Y1 - 1989
N2 - High-speed, high-density CMOS VLSI devices have powerful output buffers to charge a load capacitance quickly, which causes large switching noise on the power/ground lines. Furthermore, the equivalent impedance of the output buffer becomes lower than the characteristic impedance of the transmission line on a board, which induces complicated phenomena, including ringing noise. These problems are discussed, and the electrical characteristics of a 348-pin QFP (quad flat package) developed for a 1-micron, 129-K gate CMOS gate array is described. The factors that determine switching noise were investigated by a simulation that represents the packaging environment. A test chip for evaluating the switching noise was designed and used to characterize the 348-pin QFP. Disagreement between measured data and simulation results remains to be investigated.
AB - High-speed, high-density CMOS VLSI devices have powerful output buffers to charge a load capacitance quickly, which causes large switching noise on the power/ground lines. Furthermore, the equivalent impedance of the output buffer becomes lower than the characteristic impedance of the transmission line on a board, which induces complicated phenomena, including ringing noise. These problems are discussed, and the electrical characteristics of a 348-pin QFP (quad flat package) developed for a 1-micron, 129-K gate CMOS gate array is described. The factors that determine switching noise were investigated by a simulation that represents the packaging environment. A test chip for evaluating the switching noise was designed and used to characterize the 348-pin QFP. Disagreement between measured data and simulation results remains to be investigated.
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UR - http://www.scopus.com/inward/citedby.url?scp=0024908426&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:0024908426
SP - 531
EP - 538
BT - Proceedings - Electronic Components and Technology Conference
A2 - Anon, null
PB - Publ by IEEE
ER -