Cool mega-arrays: Ultralow-power reconfigurable accelerator chips

Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

Research output: Contribution to journalArticle

39 Citations (Scopus)

Abstract

Cool Mega-Array (CMA) is an energy-efficient reconfigurable accelerator for battery-driven mobile devices. It has a large processing-element array without memory elements for mapping an application's data-flow graph, a simple programmable microcontroller for data management, and data memory. Unlike coarse-grained dynamically reconfigurable processors, CMA reduces power consumption by switching hardware context and storing intermediate data in registers.

Original languageEnglish
Article number6060791
Pages (from-to)6-18
Number of pages13
JournalIEEE Micro
Volume31
Issue number6
DOIs
Publication statusPublished - 2011 Nov 1

Keywords

  • CMA-1
  • CMA-2
  • Cool Mega-Array
  • energy-efficient accelerator
  • processing-element array
  • reconfigurable accelerator

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Ozaki, N., Yasuda, Y., Izawa, M., Saito, Y., Ikebuchi, D., Amano, H., Nakamura, H., Usami, K., Namiki, M., & Kondo, M. (2011). Cool mega-arrays: Ultralow-power reconfigurable accelerator chips. IEEE Micro, 31(6), 6-18. [6060791]. https://doi.org/10.1109/MM.2011.94