Correlation of measurement and simulation for simultaneous switching noise of FPGA

FPGAs (Field Programmable Gate Array) are now widely used for prototyping systems as well as mid-volume products. These FPGAs are fabricated by the leading edge CMOS process technology. These may excite false logic transition due to simultaneous switching CMOS output buffers [1]-[4]. In this paper, simultaneous switching noise of FPGA was investigated by both measurement and simulation. First, a precise circuit model was established by extracting the leadframe inductance of the package and including on-chip decoupling capacitance. The power supply impedance of an evaluation board was also simulated. Then, measured waveforms were compared with time-domain simulated results. The simulated time-domain waveforms showed a good agreement with measured waveforms. Moreover, ringing frequency of the measured waveforms was well correlated with the peak of the power supply impedance.