Abstract
To improve the crystallinity of multilayer graphene (MLG) directly deposited on SiO2 for interconnect applications, a new solid phase precipitation (SPP) process involving current stress is investigated. It is found that the MLG crystallinity precipitated from a Cu capped Co-C layer can be improved by the vertical current to the Cu/Co-C but not by the horizontal current. The current enhanced SPP (CE-SPP) is expected as a mean to improve the MLG crystallinity directly deposited on SiO2.
Original language | English |
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Title of host publication | 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 244-246 |
Number of pages | 3 |
ISBN (Electronic) | 9781509046591 |
DOIs | |
Publication status | Published - 2017 Jun 13 |
Event | 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Toyama, Japan Duration: 2017 Feb 28 → 2017 Mar 2 |
Other
Other | 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 |
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Country/Territory | Japan |
City | Toyama |
Period | 17/2/28 → 17/3/2 |
Keywords
- interconnect
- multilayer graphene
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering