Degradation of electromigration lifetime of Cu/Low-k interconnects by postannealing

Yumi Kakuhara, Kazuyoshi Ueno

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

The total thermal budget of the wafer fabrication process for structures with multilevel Cu/low-k interconnects has been increasing, and itseffect on the electromigration (EM) reliability of the lower-level interconnects has become a concern. The annealing of packaged samples including two-level interconnects for EM tests was shown here to be an effective method of evaluating the effect of the thermal budget on interconnects. EM lifetime was reduced by postannealing at the maximum process temperature (350 °C), and its failure mode was a slitlike void generated at the interface between the via and the Cu line. It was shown that the degradation mechanism was related to the contact between the via and the Cu line and that postannealing may affect the stress at this contact by changing the stress in the dielectric interlayer film.

Original languageEnglish
Article number046507
JournalJapanese Journal of Applied Physics
Volume48
Issue number4
DOIs
Publication statusPublished - 2009 Apr

Fingerprint

Electromigration
electromigration
degradation
Degradation
budgets
life (durability)
Dielectric films
failure modes
Failure modes
voids
interlayers
wafers
Annealing
Fabrication
fabrication
annealing
Temperature
temperature
Hot Temperature

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

Cite this

Degradation of electromigration lifetime of Cu/Low-k interconnects by postannealing. / Kakuhara, Yumi; Ueno, Kazuyoshi.

In: Japanese Journal of Applied Physics, Vol. 48, No. 4, 046507, 04.2009.

Research output: Contribution to journalArticle

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