Kimiyoshi Usami, Aya Ishii, Atsushi Horie, Jun Iwamura

Research output: Contribution to journalConference articlepeer-review


A comparison of areas between standard cell (SC) and PLA layout results in the introduction of a parameter LA which represents the logic attribute of a functional macro block. LA is a compound parameter consisting of average logic depth D, number of inputs I, and a new parameter w which represents the logical shape of gate arrangement. To investigate the dependences of areas of SC and PLA on these parameters, the arrangement of gates, fan-in and fan-out are modeled for combinational random logic. Based on the model, logic blocks are automatically generated to be implemented by both SC and PLA. It is found that LA is a good index for predicting which of SC or PLA should be used to implement a logic block.

Original languageEnglish
Pages (from-to)379-384
Number of pages6
JournalProceedings of the Custom Integrated Circuits Conference
Publication statusPublished - 1987 Jan 1
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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