Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques

Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishikawa, Masahiro Kanazawa, Masafumi Takahashi, Mototsugu Hamada, Hideho Arakida, Toshihiro Terazawa, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

29 Citations (Scopus)

Abstract

This paper describes a fully automated low-power design methodology in which three different voltage-scaling techniques are combined together. Supply voltage is scaled globally, selectively, and adaptively while keeping the performance. This methodology enabled us to design an MPEG4 codec core with 58% less power than the original in three week turn-around-time.

Original languageEnglish
Title of host publicationProceedings - Design Automation Conference
PublisherIEEE
Pages483-488
Number of pages6
Publication statusPublished - 1998
Externally publishedYes
EventProceedings of the 1998 35th Design Automation Conference - San Francisco, CA, USA
Duration: 1998 Jun 151998 Jun 19

Other

OtherProceedings of the 1998 35th Design Automation Conference
CitySan Francisco, CA, USA
Period98/6/1598/6/19

Fingerprint

Turnaround time
Electric potential
Voltage scaling

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Usami, K., Igarashi, M., Ishikawa, T., Kanazawa, M., Takahashi, M., Hamada, M., ... Kuroda, T. (1998). Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. In Proceedings - Design Automation Conference (pp. 483-488). IEEE.

Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. / Usami, Kimiyoshi; Igarashi, Mutsunori; Ishikawa, Takashi; Kanazawa, Masahiro; Takahashi, Masafumi; Hamada, Mototsugu; Arakida, Hideho; Terazawa, Toshihiro; Kuroda, Tadahiro.

Proceedings - Design Automation Conference. IEEE, 1998. p. 483-488.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Usami, K, Igarashi, M, Ishikawa, T, Kanazawa, M, Takahashi, M, Hamada, M, Arakida, H, Terazawa, T & Kuroda, T 1998, Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. in Proceedings - Design Automation Conference. IEEE, pp. 483-488, Proceedings of the 1998 35th Design Automation Conference, San Francisco, CA, USA, 98/6/15.
Usami K, Igarashi M, Ishikawa T, Kanazawa M, Takahashi M, Hamada M et al. Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. In Proceedings - Design Automation Conference. IEEE. 1998. p. 483-488
Usami, Kimiyoshi ; Igarashi, Mutsunori ; Ishikawa, Takashi ; Kanazawa, Masahiro ; Takahashi, Masafumi ; Hamada, Mototsugu ; Arakida, Hideho ; Terazawa, Toshihiro ; Kuroda, Tadahiro. / Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. Proceedings - Design Automation Conference. IEEE, 1998. pp. 483-488
@inproceedings{0d62ba8a17cb4a8e858b5379fc2c93c4,
title = "Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques",
abstract = "This paper describes a fully automated low-power design methodology in which three different voltage-scaling techniques are combined together. Supply voltage is scaled globally, selectively, and adaptively while keeping the performance. This methodology enabled us to design an MPEG4 codec core with 58{\%} less power than the original in three week turn-around-time.",
author = "Kimiyoshi Usami and Mutsunori Igarashi and Takashi Ishikawa and Masahiro Kanazawa and Masafumi Takahashi and Mototsugu Hamada and Hideho Arakida and Toshihiro Terazawa and Tadahiro Kuroda",
year = "1998",
language = "English",
pages = "483--488",
booktitle = "Proceedings - Design Automation Conference",
publisher = "IEEE",

}

TY - GEN

T1 - Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques

AU - Usami, Kimiyoshi

AU - Igarashi, Mutsunori

AU - Ishikawa, Takashi

AU - Kanazawa, Masahiro

AU - Takahashi, Masafumi

AU - Hamada, Mototsugu

AU - Arakida, Hideho

AU - Terazawa, Toshihiro

AU - Kuroda, Tadahiro

PY - 1998

Y1 - 1998

N2 - This paper describes a fully automated low-power design methodology in which three different voltage-scaling techniques are combined together. Supply voltage is scaled globally, selectively, and adaptively while keeping the performance. This methodology enabled us to design an MPEG4 codec core with 58% less power than the original in three week turn-around-time.

AB - This paper describes a fully automated low-power design methodology in which three different voltage-scaling techniques are combined together. Supply voltage is scaled globally, selectively, and adaptively while keeping the performance. This methodology enabled us to design an MPEG4 codec core with 58% less power than the original in three week turn-around-time.

UR - http://www.scopus.com/inward/record.url?scp=0031639539&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031639539&partnerID=8YFLogxK

M3 - Conference contribution

SP - 483

EP - 488

BT - Proceedings - Design Automation Conference

PB - IEEE

ER -