Design of a 32bit microprocessor, TX1

Takeji Tokumaru, Eiji Masuda, Chikahiro Hori, Kimiyoshi Usami, Misao Miyata, Jun Iwamura

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Abstract

TX1 is a 32-bit microprocessor of the Toshiba TX series of microprocessors, which are fully based on the TRON architecture. TX1 supports 88 instructions and executes basic instructions in 2 cycles at 25 MHz. The average performance of TX1 is more than 5 MIPS. Implementation of the TX1 is described. Particular emphasis is placed on a design style suitable for VLSI microprocessors including full utilization of design automation such as logic synthesis and automatic place and router. The clock skew problem is also studied and successfully resolved.

Original languageEnglish
Pages33-34
Number of pages2
Publication statusPublished - 1988 Dec 1
Event1988 Symposium on VLSI Circuits - Digest of Technical Papers - Tokyo, Japan
Duration: 1988 Aug 221988 Aug 24

Other

Other1988 Symposium on VLSI Circuits - Digest of Technical Papers
CityTokyo, Japan
Period88/8/2288/8/24

ASJC Scopus subject areas

  • Engineering(all)

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    Tokumaru, T., Masuda, E., Hori, C., Usami, K., Miyata, M., & Iwamura, J. (1988). Design of a 32bit microprocessor, TX1. 33-34. Paper presented at 1988 Symposium on VLSI Circuits - Digest of Technical Papers, Tokyo, Japan, .