Abstract
This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-μm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.
Original language | English |
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Pages (from-to) | 382-389 |
Number of pages | 8 |
Journal | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
Volume | E93-A |
Issue number | 2 |
DOIs | |
Publication status | Published - 2010 Feb |
Externally published | Yes |
Keywords
- Current-mode
- Voltage-to-current converter
ASJC Scopus subject areas
- Signal Processing
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
- Applied Mathematics