Design optimization of active shield circuits for digital noise suppression based on average noise evaluation

Retdian A. Nicodimus; Hiroto Suzuki; Kazuyuki Wada; Shigetaka Takagi

doi:10.1093/ietfec/e88-a.2.444

Design optimization of active shield circuits for digital noise suppression based on average noise evaluation

Retdian A. Nicodimus, Hiroto Suzuki, Kazuyuki Wada, Shigetaka Takagi

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

A design optimization of active shield circuit using noise averaging method is proposed. The relation between the averaged noise and the design parameters of the active shield circuit such as circuit gain and on-chip layout is examined. A simple design guideline is also provided. Simulation results show that the active shield circuit designed by the proposed optimization method gives a better noise suppression performance of about 28% than the conventional one.

Original language	English
Pages (from-to)	444-449
Number of pages	6
Journal	IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Volume	E88-A
Issue number	2
DOIs	https://doi.org/10.1093/ietfec/e88-a.2.444
Publication status	Published - 2005
Externally published	Yes

Keywords

Active noise cancellation
Active shield circuit
Digital noise
Mixed-signal integrated circuits
Substrats coupling

ASJC Scopus subject areas

Signal Processing
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering
Applied Mathematics

Access to Document

10.1093/ietfec/e88-a.2.444

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Design optimization of active shield circuits for digital noise suppression based on average noise evaluation. / Nicodimus, Retdian A.; Suzuki, Hiroto; Wada, Kazuyuki; Takagi, Shigetaka.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E88-A, No. 2, 2005, p. 444-449.

Research output: Contribution to journal › Article › peer-review

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