Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module

T. Sudo, N. Hirano, K. Kato, Y. Hiruta, Y. Fuchida

Research output: Contribution to journalArticle

1 Citation (Scopus)
Original languageEnglish
Pages (from-to)710-716
JournalECTE(Electronic Components and Technology Conference)'92
Publication statusPublished - 1992 May 1

Cite this

Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module. / Sudo, T.; Hirano, N.; Kato, K.; Hiruta, Y.; Fuchida, Y.

In: ECTE(Electronic Components and Technology Conference)'92, 01.05.1992, p. 710-716.

Research output: Contribution to journalArticle

Sudo, T. ; Hirano, N. ; Kato, K. ; Hiruta, Y. ; Fuchida, Y. / Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module. In: ECTE(Electronic Components and Technology Conference)'92. 1992 ; pp. 710-716.
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