Double side information concatenated coding scheme for fading environments -experimental evaluation employing SNUFEC VLSI-

Katsuhiko Kawazoe; Masanobu Suzuki; Shuji Kubota; Shuzo Kato

Double side information concatenated coding scheme for fading environments -experimental evaluation employing SNUFEC VLSI-

Katsuhiko Kawazoe, Masanobu Suzuki, Shuji Kubota, Shuzo Kato

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In order to realize a high-coding-gain forward error correction scheme for fading environments, a novel concatenated coding scheme employing soft decision decoding with channel-status-information (CSI) for inner codes and also soft decision decoding for outer codes (Double side information concatenated coding scheme) is proposed and its performance is clarified by a hardware experiment employing the developed ultra-high-speed (operation speed up to 60MHz) and universal-coding-rate (from coding rates one-half to fifteen-sixteenths) Viterbi decoder VLSIC (SNUFEC VLSI). The proposed scheme improves the Pe performance to 1/3 of conventional one by employing the SNUFEC VLSI which can output the path memory circuit status 1,0 ratio as the soft-decision decoding data for likelihood information.

Original language	English
Title of host publication	Conference Record - International Conference on Communications
Publisher	Publ by IEEE
Pages	1576-1580
Number of pages	5
ISBN (Print)	0780318269
Publication status	Published - 1994 Jan 1
Externally published	Yes
Event	Proceedings of the 1994 IEEE International Conference on Communications - New Orleans, LA, USA Duration: 1994 May 1 → 1994 May 5

Publication series

Name	Conference Record - International Conference on Communications
Volume	3
ISSN (Print)	0536-1486

Other

Other	Proceedings of the 1994 IEEE International Conference on Communications
City	New Orleans, LA, USA
Period	94/5/1 → 94/5/5

ASJC Scopus subject areas

Computer Networks and Communications
Electrical and Electronic Engineering

Cite this

Double side information concatenated coding scheme for fading environments -experimental evaluation employing SNUFEC VLSI-. / Kawazoe, Katsuhiko; Suzuki, Masanobu; Kubota, Shuji; Kato, Shuzo.

Conference Record - International Conference on Communications. Publ by IEEE, 1994. p. 1576-1580 (Conference Record - International Conference on Communications; Vol. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kawazoe, K, Suzuki, M, Kubota, S & Kato, S 1994, Double side information concatenated coding scheme for fading environments -experimental evaluation employing SNUFEC VLSI-. in Conference Record - International Conference on Communications. Conference Record - International Conference on Communications, vol. 3, Publ by IEEE, pp. 1576-1580, Proceedings of the 1994 IEEE International Conference on Communications, New Orleans, LA, USA, 94/5/1.

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N2 - In order to realize a high-coding-gain forward error correction scheme for fading environments, a novel concatenated coding scheme employing soft decision decoding with channel-status-information (CSI) for inner codes and also soft decision decoding for outer codes (Double side information concatenated coding scheme) is proposed and its performance is clarified by a hardware experiment employing the developed ultra-high-speed (operation speed up to 60MHz) and universal-coding-rate (from coding rates one-half to fifteen-sixteenths) Viterbi decoder VLSIC (SNUFEC VLSI). The proposed scheme improves the Pe performance to 1/3 of conventional one by employing the SNUFEC VLSI which can output the path memory circuit status 1,0 ratio as the soft-decision decoding data for likelihood information.

AB - In order to realize a high-coding-gain forward error correction scheme for fading environments, a novel concatenated coding scheme employing soft decision decoding with channel-status-information (CSI) for inner codes and also soft decision decoding for outer codes (Double side information concatenated coding scheme) is proposed and its performance is clarified by a hardware experiment employing the developed ultra-high-speed (operation speed up to 60MHz) and universal-coding-rate (from coding rates one-half to fifteen-sixteenths) Viterbi decoder VLSIC (SNUFEC VLSI). The proposed scheme improves the Pe performance to 1/3 of conventional one by employing the SNUFEC VLSI which can output the path memory circuit status 1,0 ratio as the soft-decision decoding data for likelihood information.

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Double side information concatenated coding scheme for fading environments -experimental evaluation employing SNUFEC VLSI-

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