Abstract
This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is dynamically selected at each PE at the context-by-context basis. We designed a part of a PE array and applied this technique. A test chip fabricated in 65nm technology operated successfully. Detailed simulations revealed that energy reduction is hindered by energy overhead due to supply switching when we use even lower VDD. We propose a mapping optimization algorithm "PFCM" to minimize the overhead. PFCM reduced energy overhead by 90.8% and thereby the dynamic VDD switching technique reduced energy dissipation by up to 12.5% when running sepia filter, alpha blender and Laplacian filter programs.
| Original language | English |
|---|---|
| Title of host publication | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
| Pages | 230-241 |
| Number of pages | 12 |
| Volume | 6578 LNCS |
| DOIs | |
| Publication status | Published - 2011 |
| Event | 7th International Symposium on Applied Reconfigurable Computing, ARC 2011 - Belfast Duration: 2011 Mar 23 → 2011 Mar 25 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 6578 LNCS |
| ISSN (Print) | 03029743 |
| ISSN (Electronic) | 16113349 |
Other
| Other | 7th International Symposium on Applied Reconfigurable Computing, ARC 2011 |
|---|---|
| City | Belfast |
| Period | 11/3/23 → 11/3/25 |
Fingerprint
Keywords
- Dynamic V Switching
- Dynamically Reconfigurable Processor
- Mapping Optimization
- Power Reduction
ASJC Scopus subject areas
- Computer Science(all)
- Theoretical Computer Science
Cite this
Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. / Yamamoto, Tatsuya; Hironaka, Kazuei; Hayakawa, Yuki; Kimura, Masayuki; Amano, Hideharu; Usami, Kimiyoshi.
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6578 LNCS 2011. p. 230-241 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6578 LNCS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction
AU - Yamamoto, Tatsuya
AU - Hironaka, Kazuei
AU - Hayakawa, Yuki
AU - Kimura, Masayuki
AU - Amano, Hideharu
AU - Usami, Kimiyoshi
PY - 2011
Y1 - 2011
N2 - This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is dynamically selected at each PE at the context-by-context basis. We designed a part of a PE array and applied this technique. A test chip fabricated in 65nm technology operated successfully. Detailed simulations revealed that energy reduction is hindered by energy overhead due to supply switching when we use even lower VDD. We propose a mapping optimization algorithm "PFCM" to minimize the overhead. PFCM reduced energy overhead by 90.8% and thereby the dynamic VDD switching technique reduced energy dissipation by up to 12.5% when running sepia filter, alpha blender and Laplacian filter programs.
AB - This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is dynamically selected at each PE at the context-by-context basis. We designed a part of a PE array and applied this technique. A test chip fabricated in 65nm technology operated successfully. Detailed simulations revealed that energy reduction is hindered by energy overhead due to supply switching when we use even lower VDD. We propose a mapping optimization algorithm "PFCM" to minimize the overhead. PFCM reduced energy overhead by 90.8% and thereby the dynamic VDD switching technique reduced energy dissipation by up to 12.5% when running sepia filter, alpha blender and Laplacian filter programs.
KW - Dynamic V Switching
KW - Dynamically Reconfigurable Processor
KW - Mapping Optimization
KW - Power Reduction
UR - http://www.scopus.com/inward/record.url?scp=79953188709&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79953188709&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-19475-7_24
DO - 10.1007/978-3-642-19475-7_24
M3 - Conference contribution
AN - SCOPUS:79953188709
SN - 9783642194740
VL - 6578 LNCS
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 230
EP - 241
BT - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ER -