Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction

Tatsuya Yamamoto, Kazuei Hironaka, Yuki Hayakawa, Masayuki Kimura, Hideharu Amano, Kimiyoshi Usami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is dynamically selected at each PE at the context-by-context basis. We designed a part of a PE array and applied this technique. A test chip fabricated in 65nm technology operated successfully. Detailed simulations revealed that energy reduction is hindered by energy overhead due to supply switching when we use even lower VDD. We propose a mapping optimization algorithm "PFCM" to minimize the overhead. PFCM reduced energy overhead by 90.8% and thereby the dynamic VDD switching technique reduced energy dissipation by up to 12.5% when running sepia filter, alpha blender and Laplacian filter programs.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Pages230-241
Number of pages12
Volume6578 LNCS
DOIs
Publication statusPublished - 2011
Event7th International Symposium on Applied Reconfigurable Computing, ARC 2011 - Belfast
Duration: 2011 Mar 232011 Mar 25

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume6578 LNCS
ISSN (Print)03029743
ISSN (Electronic)16113349

Other

Other7th International Symposium on Applied Reconfigurable Computing, ARC 2011
CityBelfast
Period11/3/2311/3/25

Fingerprint

Energy dissipation

Keywords

  • Dynamic V Switching
  • Dynamically Reconfigurable Processor
  • Mapping Optimization
  • Power Reduction

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

Cite this

Yamamoto, T., Hironaka, K., Hayakawa, Y., Kimura, M., Amano, H., & Usami, K. (2011). Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 6578 LNCS, pp. 230-241). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6578 LNCS). https://doi.org/10.1007/978-3-642-19475-7_24

Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. / Yamamoto, Tatsuya; Hironaka, Kazuei; Hayakawa, Yuki; Kimura, Masayuki; Amano, Hideharu; Usami, Kimiyoshi.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6578 LNCS 2011. p. 230-241 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6578 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamamoto, T, Hironaka, K, Hayakawa, Y, Kimura, M, Amano, H & Usami, K 2011, Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). vol. 6578 LNCS, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 6578 LNCS, pp. 230-241, 7th International Symposium on Applied Reconfigurable Computing, ARC 2011, Belfast, 11/3/23. https://doi.org/10.1007/978-3-642-19475-7_24
Yamamoto T, Hironaka K, Hayakawa Y, Kimura M, Amano H, Usami K. Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6578 LNCS. 2011. p. 230-241. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). https://doi.org/10.1007/978-3-642-19475-7_24
Yamamoto, Tatsuya ; Hironaka, Kazuei ; Hayakawa, Yuki ; Kimura, Masayuki ; Amano, Hideharu ; Usami, Kimiyoshi. / Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6578 LNCS 2011. pp. 230-241 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
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