Effective processing on a digital signal processor with complex arithmetic capability

Yoshimasa Negishi, Eiji Watanabe, Akinori Nishihara, Takeshi Yanagisawa

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems - Proceedings
Place of PublicationPiscataway, NJ, United States
PublisherIEEE
Pages619-622
Number of pages4
ISBN (Print)0780351460
Publication statusPublished - 1998
EventProceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems - Microelectronics and Integrating Systems (IEEE APCCAS-98) - Chiangmai, Thailand
Duration: 1998 Nov 241998 Nov 27

Other

OtherProceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems - Microelectronics and Integrating Systems (IEEE APCCAS-98)
CityChiangmai, Thailand
Period98/11/2498/11/27

Fingerprint

Digital signal processors
Networks (circuits)
Processing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Negishi, Y., Watanabe, E., Nishihara, A., & Yanagisawa, T. (1998). Effective processing on a digital signal processor with complex arithmetic capability. In IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings (pp. 619-622). Piscataway, NJ, United States: IEEE.

Effective processing on a digital signal processor with complex arithmetic capability. / Negishi, Yoshimasa; Watanabe, Eiji; Nishihara, Akinori; Yanagisawa, Takeshi.

IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings. Piscataway, NJ, United States : IEEE, 1998. p. 619-622.

Research output: Chapter in Book/Report/Conference proceedingChapter

Negishi, Y, Watanabe, E, Nishihara, A & Yanagisawa, T 1998, Effective processing on a digital signal processor with complex arithmetic capability. in IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings. IEEE, Piscataway, NJ, United States, pp. 619-622, Proceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems - Microelectronics and Integrating Systems (IEEE APCCAS-98), Chiangmai, Thailand, 98/11/24.
Negishi Y, Watanabe E, Nishihara A, Yanagisawa T. Effective processing on a digital signal processor with complex arithmetic capability. In IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings. Piscataway, NJ, United States: IEEE. 1998. p. 619-622
Negishi, Yoshimasa ; Watanabe, Eiji ; Nishihara, Akinori ; Yanagisawa, Takeshi. / Effective processing on a digital signal processor with complex arithmetic capability. IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings. Piscataway, NJ, United States : IEEE, 1998. pp. 619-622
@inbook{30959c36c5ea45849c8903bbada12b79,
title = "Effective processing on a digital signal processor with complex arithmetic capability",
abstract = "Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.",
author = "Yoshimasa Negishi and Eiji Watanabe and Akinori Nishihara and Takeshi Yanagisawa",
year = "1998",
language = "English",
isbn = "0780351460",
pages = "619--622",
booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings",
publisher = "IEEE",

}

TY - CHAP

T1 - Effective processing on a digital signal processor with complex arithmetic capability

AU - Negishi, Yoshimasa

AU - Watanabe, Eiji

AU - Nishihara, Akinori

AU - Yanagisawa, Takeshi

PY - 1998

Y1 - 1998

N2 - Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.

AB - Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.

UR - http://www.scopus.com/inward/record.url?scp=0032218291&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0032218291&partnerID=8YFLogxK

M3 - Chapter

AN - SCOPUS:0032218291

SN - 0780351460

SP - 619

EP - 622

BT - IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings

PB - IEEE

CY - Piscataway, NJ, United States

ER -