Electrical design and characterization of Si interposer for system-in-package (SiP)

Shinobu Kato; Tomoyuki Tango; Kiyohisa Hasegawa; Ramesh K. Bhandari; Atsushi Sakai; Hiroshi Segawa; Takashi Kariya; Toshio Sudo

doi:10.1109/ECTC.2009.5074236

Electrical design and characterization of Si interposer for system-in-package (SiP)

Shinobu Kato, Tomoyuki Tango, Kiyohisa Hasegawa, Ramesh K. Bhandari, Atsushi Sakai, Hiroshi Segawa, Takashi Kariya, Toshio Sudo

Shibaura Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

Si interposer technology has the potential to enable highbandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (≤5um) wiring can be fabricated. However, the ultrafine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.

Original language	English
Title of host publication	Proceedings - Electronic Components and Technology Conference
Pages	1648-1653
Number of pages	6
DOIs	https://doi.org/10.1109/ECTC.2009.5074236
Publication status	Published - 2009
Event	2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA Duration: 2009 May 26 → 2009 May 29

Other

Other	2009 59th Electronic Components and Technology Conference, ECTC 2009
City	San Diego, CA
Period	09/5/26 → 09/5/29

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ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Cite this

Kato, S., Tango, T., Hasegawa, K., Bhandari, R. K., Sakai, A., Segawa, H., ... Sudo, T. (2009). Electrical design and characterization of Si interposer for system-in-package (SiP). In Proceedings - Electronic Components and Technology Conference (pp. 1648-1653). [5074236] https://doi.org/10.1109/ECTC.2009.5074236

Electrical design and characterization of Si interposer for system-in-package (SiP). / Kato, Shinobu; Tango, Tomoyuki; Hasegawa, Kiyohisa; Bhandari, Ramesh K.; Sakai, Atsushi; Segawa, Hiroshi; Kariya, Takashi; Sudo, Toshio.

Proceedings - Electronic Components and Technology Conference. 2009. p. 1648-1653 5074236.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kato, S, Tango, T, Hasegawa, K, Bhandari, RK, Sakai, A, Segawa, H, Kariya, T & Sudo, T 2009, Electrical design and characterization of Si interposer for system-in-package (SiP). in Proceedings - Electronic Components and Technology Conference., 5074236, pp. 1648-1653, 2009 59th Electronic Components and Technology Conference, ECTC 2009, San Diego, CA, 09/5/26. https://doi.org/10.1109/ECTC.2009.5074236

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AB - Si interposer technology has the potential to enable highbandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (≤5um) wiring can be fabricated. However, the ultrafine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.

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Access to Document

10.1109/ECTC.2009.5074236