Electrical design and characterization of Si interposer for system-in-package (SiP)

Shinobu Kato, Tomoyuki Tango, Kiyohisa Hasegawa, Ramesh K. Bhandari, Atsushi Sakai, Hiroshi Segawa, Takashi Kariya, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

Si interposer technology has the potential to enable highbandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (≤5um) wiring can be fabricated. However, the ultrafine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.

Original languageEnglish
Title of host publicationProceedings - Electronic Components and Technology Conference
Pages1648-1653
Number of pages6
DOIs
Publication statusPublished - 2009
Event2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA
Duration: 2009 May 262009 May 29

Other

Other2009 59th Electronic Components and Technology Conference, ECTC 2009
CitySan Diego, CA
Period09/5/2609/5/29

Fingerprint

Electric wiring
Image processing
System-in-package
Ultrafine

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kato, S., Tango, T., Hasegawa, K., Bhandari, R. K., Sakai, A., Segawa, H., ... Sudo, T. (2009). Electrical design and characterization of Si interposer for system-in-package (SiP). In Proceedings - Electronic Components and Technology Conference (pp. 1648-1653). [5074236] https://doi.org/10.1109/ECTC.2009.5074236

Electrical design and characterization of Si interposer for system-in-package (SiP). / Kato, Shinobu; Tango, Tomoyuki; Hasegawa, Kiyohisa; Bhandari, Ramesh K.; Sakai, Atsushi; Segawa, Hiroshi; Kariya, Takashi; Sudo, Toshio.

Proceedings - Electronic Components and Technology Conference. 2009. p. 1648-1653 5074236.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kato, S, Tango, T, Hasegawa, K, Bhandari, RK, Sakai, A, Segawa, H, Kariya, T & Sudo, T 2009, Electrical design and characterization of Si interposer for system-in-package (SiP). in Proceedings - Electronic Components and Technology Conference., 5074236, pp. 1648-1653, 2009 59th Electronic Components and Technology Conference, ECTC 2009, San Diego, CA, 09/5/26. https://doi.org/10.1109/ECTC.2009.5074236
Kato S, Tango T, Hasegawa K, Bhandari RK, Sakai A, Segawa H et al. Electrical design and characterization of Si interposer for system-in-package (SiP). In Proceedings - Electronic Components and Technology Conference. 2009. p. 1648-1653. 5074236 https://doi.org/10.1109/ECTC.2009.5074236
Kato, Shinobu ; Tango, Tomoyuki ; Hasegawa, Kiyohisa ; Bhandari, Ramesh K. ; Sakai, Atsushi ; Segawa, Hiroshi ; Kariya, Takashi ; Sudo, Toshio. / Electrical design and characterization of Si interposer for system-in-package (SiP). Proceedings - Electronic Components and Technology Conference. 2009. pp. 1648-1653
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