TY - GEN
T1 - Electrical design and characterization of Si interposer for system-in-package (SiP)
AU - Kato, Shinobu
AU - Tango, Tomoyuki
AU - Hasegawa, Kiyohisa
AU - Bhandari, Ramesh K.
AU - Sakai, Atsushi
AU - Segawa, Hiroshi
AU - Kariya, Takashi
AU - Sudo, Toshio
PY - 2009
Y1 - 2009
N2 - Si interposer technology has the potential to enable highbandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (≤5um) wiring can be fabricated. However, the ultrafine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.
AB - Si interposer technology has the potential to enable highbandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (≤5um) wiring can be fabricated. However, the ultrafine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.
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U2 - 10.1109/ECTC.2009.5074236
DO - 10.1109/ECTC.2009.5074236
M3 - Conference contribution
AN - SCOPUS:70349666679
SN - 9781424444762
T3 - Proceedings - Electronic Components and Technology Conference
SP - 1648
EP - 1653
BT - 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009
T2 - 2009 59th Electronic Components and Technology Conference, ECTC 2009
Y2 - 26 May 2009 through 29 May 2009
ER -