Energy-efficient standard cell memory with optimized body-bias separation in Silicon-on-Thin-BOX (SOTB)

Yusuke Yoshida, Kimiyoshi Usami

Research output: Contribution to journalArticle

Abstract

This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.

Original languageEnglish
Pages (from-to)2785-2796
Number of pages12
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE100A
Issue number12
DOIs
Publication statusPublished - 2017 Dec 1

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Keywords

  • Body bias
  • Energy-efficient
  • Silicon-on-thin-box (SOTB)
  • Standard cell memory
  • Ultra-low voltage

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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