Fully ion-implanted low-noise GaAs MESFET's with a 0.11-m Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeterwave integrated circuits (MMIC's). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (Lfe) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (/T) and a maximum stable gain (MSG) decrease monotonously as L/, increases on account of parasitic capacitance. However, the device with Lfc of 1.0 pm, which has lower gate resistance than 1.0 fi, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's.
- Gate resistance
- Noise performance
- Semiconductor device fabrication
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering