Fast road lane detection by parallel image processor and monocular camera

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Automatic road lane detection is one of the significant problem in Intelligent Transport Systems (ITS). Many studies have been conducted for this interesting problem by using on-vehicle cameras. However, those methods still needs a dozens of milliseconds for image processing. To develop the quick control of the vehicle following lanes, further computational time reduction is expected. Furthermore, regarding the applications, compact hardware is also expected for implementation. Thus, we study on computational time reduction of the road lane detection by using a small-type parallel image processor. Here, computational time is reduced by developing a lane detection algorithm regarding the parallel processing concept of that hardware. According to the experiments, we could limit average computational time for 20 milliseconds with a good lane detection performance.

Original languageEnglish
Title of host publicationWMSCI 2015 - 19th World Multi-Conference on Systemics, Cybernetics and Informatics, Proceedings
EditorsLeonid Perlovsky, Belkis Sanchez, Shigehiro Hashimoto, Jang-Ruey Tzeng, Nagib C. Callaos
PublisherInternational Institute of Informatics and Systemics, IIIS
Pages188-191
Number of pages4
ISBN (Electronic)9781941763254
Publication statusPublished - 2015
Event19th World Multi-Conference on Systemics, Cybernetics and Informatics, WMSCI 2015 - Orlando, United States
Duration: 2015 Jul 122015 Jul 15

Publication series

NameWMSCI 2015 - 19th World Multi-Conference on Systemics, Cybernetics and Informatics, Proceedings
Volume2

Other

Other19th World Multi-Conference on Systemics, Cybernetics and Informatics, WMSCI 2015
CountryUnited States
CityOrlando
Period15/7/1215/7/15

Keywords

  • Image processing
  • Monocular camera
  • Parallel processing
  • Road lane detection

ASJC Scopus subject areas

  • Engineering(all)

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