Abstract
This paper describes a new GaAs static flip-flop, called TD-FF (Tri-state Driver Flip-Flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The TD-FF operates at a data rate of 10 Gbps with 18 mW power consumption at 0.8 V supply voltage. The 10 Gbps power consumption is 1/5 of the minimum value ever reported for D-FFs (Delay-type Flip-Flops). The authors also demonstrate a 1/8 static frequency divider IC using the TD-FF configuration. This IC operates up to 10 GHz with 38 mW at 0.8 V supply voltage.
| Original language | English |
|---|---|
| Title of host publication | NEC Research and Development |
| Pages | 157-164 |
| Number of pages | 8 |
| Volume | 36 |
| Edition | 1 |
| Publication status | Published - 1995 Jan |
| Externally published | Yes |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
High-speed low-power tri-state driver flip-flop for sub-1 V supply voltage GaAs heterojunction FET LSIs. / Maeda, Tadashi; Numata, Keiichi; Tokushima, Masatoshi; Ishikawa, Masaoki; Fukaishi, Muneo; Hida, Hikaru; Ohno, Yasuo.
NEC Research and Development. Vol. 36 1. ed. 1995. p. 157-164.Research output: Chapter in Book/Report/Conference proceeding › Chapter
}
TY - CHAP
T1 - High-speed low-power tri-state driver flip-flop for sub-1 V supply voltage GaAs heterojunction FET LSIs
AU - Maeda, Tadashi
AU - Numata, Keiichi
AU - Tokushima, Masatoshi
AU - Ishikawa, Masaoki
AU - Fukaishi, Muneo
AU - Hida, Hikaru
AU - Ohno, Yasuo
PY - 1995/1
Y1 - 1995/1
N2 - This paper describes a new GaAs static flip-flop, called TD-FF (Tri-state Driver Flip-Flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The TD-FF operates at a data rate of 10 Gbps with 18 mW power consumption at 0.8 V supply voltage. The 10 Gbps power consumption is 1/5 of the minimum value ever reported for D-FFs (Delay-type Flip-Flops). The authors also demonstrate a 1/8 static frequency divider IC using the TD-FF configuration. This IC operates up to 10 GHz with 38 mW at 0.8 V supply voltage.
AB - This paper describes a new GaAs static flip-flop, called TD-FF (Tri-state Driver Flip-Flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The TD-FF operates at a data rate of 10 Gbps with 18 mW power consumption at 0.8 V supply voltage. The 10 Gbps power consumption is 1/5 of the minimum value ever reported for D-FFs (Delay-type Flip-Flops). The authors also demonstrate a 1/8 static frequency divider IC using the TD-FF configuration. This IC operates up to 10 GHz with 38 mW at 0.8 V supply voltage.
UR - http://www.scopus.com/inward/record.url?scp=0029228568&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0029228568&partnerID=8YFLogxK
M3 - Chapter
AN - SCOPUS:0029228568
VL - 36
SP - 157
EP - 164
BT - NEC Research and Development
ER -