Abstract
This paper describes a new GaAs static flip-flop, called TD-FF (Tri-state Driver Flip-Flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The TD-FF operates at a data rate of 10 Gbps with 18 mW power consumption at 0.8 V supply voltage. The 10 Gbps power consumption is 1/5 of the minimum value ever reported for D-FFs (Delay-type Flip-Flops). The authors also demonstrate a 1/8 static frequency divider IC using the TD-FF configuration. This IC operates up to 10 GHz with 38 mW at 0.8 V supply voltage.
| Original language | English |
|---|---|
| Title of host publication | NEC Research and Development |
| Pages | 157-164 |
| Number of pages | 8 |
| Volume | 36 |
| Edition | 1 |
| Publication status | Published - 1995 Jan 1 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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Cite this
Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., Hida, H., & Ohno, Y. (1995). High-speed low-power tri-state driver flip-flop for sub-1 V supply voltage GaAs heterojunction FET LSIs. In NEC Research and Development (1 ed., Vol. 36, pp. 157-164)