Hum noise suppression using an on-chip N-path notch filter

Nicodimus Retdian, Khilda Afifah

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes an on-chip implementation of N-path notch filter for hum noise suppression. The suppression of hum noise frequency at 50 or 60 Hz requires a filter with a large time constant. The conventional N-path notch filter requires a total capacitance in the order of micro-Farads. A fully SC topology is utilized to reduce the total capacitance down to 213pF and thus enable an on-chip implementation of the filter. Simulation results show a hum noise suppression by 62.94dB with a filter notch bandwidth of 1.13Hz. The integrated output noise of the filter is 49.67µVrms.

Original languageEnglish
Title of host publicationICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728160443
DOIs
Publication statusPublished - 2020 Nov 23
Event27th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2020 - Glasgow, United Kingdom
Duration: 2020 Nov 232020 Nov 25

Publication series

NameICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings

Conference

Conference27th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2020
Country/TerritoryUnited Kingdom
CityGlasgow
Period20/11/2320/11/25

Keywords

  • Hum noise
  • N-path filter
  • Notch-filter

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Hum noise suppression using an on-chip N-path notch filter'. Together they form a unique fingerprint.

Cite this